Dear tohrusenbongi,
The low-power mode referred by you is named this way due to that Vybrid consumes in it relatively less power than in the high-power modes listed above it in the datasheet table. All the numbers in it refer to 1.2V core power as well, since the power scheme used is single-rail (3.3V only).
If you decide to keep the existing, i.e. linear, power management scheme, the only “workaround” is the one you've already found – lower ballast NPN transistor’s collector voltage. In this case you generate 3.3V (for I/Os) and 1.5V (for DDR) using switch-mode voltage regulators, and use 1.5V for the ballast transistor’s collector (whose size can be reduced tremendously). Then the 1.5V-to-1.2V conversion efficiency will be 80%, very close to that of a regular switch-mode voltage regulator, but the solution much simpler and cheaper.
Please also check if you can lower consumption by turning off Vybrid's blocks not used by your specific use case (refer to our documentation for details).
More detailed Vybrid power consumption data, for various use cases, can be found on the below link (not sure, though, if you have access permission for that):
https://community.freescale.com/message/316584#316584.
Sincerely yours, Naoum Gitnik.