The Vybrid needs a way to calibrate DDR3 settings after using Processor Expert to determine all the base-line register settings. Something like the i.MX6/7 stress tester. Will someone please point me to a tool to do this. And don't point me to this:
CodeWarrior Networked Applications: DDRV|Freescale
...as I'm not using CodeWarrior. Nor this:
CodeWarrior Networked Applications: DDRV|Freescale
...as it does not have a tuning feature - only a validation feature that requires a license.
What I'm looking for is the code that produced the logs found in this discussion:
Bring up DDR3 Memory on Vybrid
Thanks,
Antonio Jenkins
Solved! Go to Solution.
Hello Antonio,
There is not any other tool for tune DRAM memories for Vybrid. i.MX uses primarily DDR stress tester. But it is not available for Vybrid.
DDRv tool is not the best tools, but it is able to tune necessary registers. Yes it requires license.
I used it a part of Driver suite 10.4 + update not CW.
Second option is to prepare your own tuning tool and tune:
Start with: vybrid.c version 9C Mark attached
change Master DLL setting to at least 0x0023012A ( PHY03/19/35 )
DDRMC_CR105 | [15:8] | RDLVL_DL_0 | Number of delay elements to adjust the DQS strobe for a Read Command, Data Slice 0 |
DDRMC_CR106 | [7:0] | RDLVL_GTDL_0 | Number of delay elements to gate DQS pad input prior to arrival of Read DQS strobe, Data Slice 0. |
DDRMC_CR110 | [23:16] | RDLVL_GTDL_1 | Number of delay elements to gate DQS pad input prior to arrival of Read DQS strobe, Data Slice 1. |
[7:0] | RDLVL_DL_1 | Number of delay elements to adjust the DQS strobe for a Read Command, Data Slice 1 | |
DDRMC_PHY04 | [14:8] | DLL_WRITE_DL | Number of delay elements to adjust the DQS strobe for a Write Command, Data Slice 0 |
DDRMC_PHY20 | [14:8] | DLL_WRITE_DL | Number of delay elements to adjust the DQS strobe for a Write Command, Data Slice 1 |
/Jiri
What tap works with Processor Expert and the DDRv tool for the vybrid processor?
Hello James,
Do you mean tab in PE software? If yes, then you need to add DDR_mc1:Init_DRR and tab Validation.
/Jiri
Hi Jiri, I mean which JTAG tap works with the PE tab to connect to the board.
Hi James,
jLink only - you need Segger driver instalated.
/Jiri
will the jlink base work ?
Thanks
Hello James,
Used same one. The only difference is that they call it now BASE.
/Jiri