In the just released technical data sheet revision 8 (Document Number VYBRIDFSERIESEC), the drive level requirement of the 24 MHz crystal oscillator have been changed. Before, the requirement was 100uW, now it is increased to 250uW. It is not easy to find crystal oscillators in small SMD package with such a high drive level rating. Therefore, my question is why Freescale has increased the drive level requirement? Have there been any reports of problems with crystals that are only rated with 100uW. Are there any recommendation for a suitable 250uW crystal that would fit our 5×3.2 mm footprint on our design?
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XTAL load capacitance includes load capacitor and parasitic capacitance. Try to minimize parasitic capacitance by minimal length of conductors or quality material of the board. If parasitic capacitance is known, decrease value of load capacitors to get recommended load capacitance by XTAL manufacturer. The input capacitance of the oscillator should be also considered.
Thank you for the answer. Yes, I understand the need of minimizing the parasitic capacitance.
But what I'm trying to say is that the calculation of the Ccalc value in the calculator doesn't take into accout the stray capacitance. I see that Ccalc is calculated as Co + CL1*CL2/(CL1+CL2). In the properly designed circuit, the second summand should be equal to the CL (load capacitance) of the specific crystal used with the oscillator. So perhaps a more correct way of calculating the Ccalc is Ccalc = Co + CL, where Co - crystal's shunt capacitance; CL - cristal's load capacitance.
yes and no. It depends how XTAL manufacturer define load capacitance or load capacitors for given XTAL. For more information about power calculation please look at CHRONTEL AN-06 where power is defined as:
where Ceq is
Jiri, o) The customer measure drive current from the Vybrid at less than 100uW. o) Why exactly has the drive requirement been raised to 250uW. They want to know what the reason is, and what exactly is going on inside the Vybrid. In particular, they have a situation where a unit in the field appears to be switching from the external 24Mhz clock to the internal FIRC. However, they don't see how the external crystal is actually failing. It is not damaged, it resets ok and continues to operate for very long periods of time under heat and cold stress. They would like to know if there are things going on inside the Vybrid, causing a switch over from the external clock, perhaps erroneously, or, what at least are the parameters for making that decision, along with the mechanism by which that switch is taking place. They would like to know what registers to look at once a switch occurs to give them clues as to why it happened. They are also hoping for more details on what symptoms caused the upping from 100uW to 250uW on the i.mx or Vybrid data sheets. Thx, hy
Vybrid uses same oscillator like i.MX. So when i.MX specification has been changed it was also added to Vybrid specification. Why it happened on i.MX? Presume: to ensure that no XTAL is damaged.
Specified level is 250uW on 80 Ohm XTAL ESR (respectively 200uW on 50 Ohm ESR). 100uW still can be used. Please check EB830 and its calculator.
Important is that when maximal drive level specified by XTAL manufacturer is less than actual drive level of the XTAL oscillator, then XTAL can be physically damaged in long term period - couple of years.
Regarding transition: if I'm not mistaken it is always manual, only possibility is, that it happened in Bootrom code. If XTAL fails during boot, it can stay at FIRC.
If xtal is failing check start up time - should start in 1-1.5ms (default limit on silicon rev 1.2 (2N02G) is more than 2ms). Also XTAL with very low drive level could change its parameters when applied significantly higher drive level from oscillator. This can cause oscillator fail or instability.
drive level was specified in DS rev.8 to 250uW. I have not seen spec. to 100uW in DS. I cannot comment why. Nevertheless there is a way how to use lower value. Please look at i.MX6 Crystal Drive Level (24 MHz) EB830
Thank you for your answer, I was not aware of the i.MX6 Crystal Drive Level document. We are currently using the Qantek QC5A24.0000A14R (Rs = 50R max., C0 = 7pF max., Drive Level = 100uW max.). On the PCB, we have placed 12pF external capacitors. With the calculator in the pdf, I get a drive level of 116uW. This is slightly higher than the maximum level of our crystal. How critical would it be to keep the drive level slightly over the maximum?
Since our crystal has just a series resistance of 50R while 80R are allowed. As far as I know, this would allow to add an additional 27 series resistor between oscillator output and crystal. This would reduce the actual Vpp on the crystal and therefore the resulting drive level will be below 100uW. Could that be a solution?
BTW, here the information where the previous drive level recommendations can be found: In the datasheet Rev. 7 04/2014 in section 12.2.2 you find the table 76. In this table, there can be found the following statement: "The crystal must be rated for a maximum drive level of 100 μW or higher. An ESR (equivalent series resistance) of 80 Ω or less is recommended" I was also able to find the same statement in revision 5.
You are right, it is there. If crystal works with higher drive level than it is designed for, then in long-term time frame it can be mechanically damaged. We cannot say that it is OK if you use 116uW on XTAL which is designed to 100uW. We can expect that XTAL will handle little bit more than it is specified. But it is more question for XTAL producer.
Not sure about adding serial resistor. Increase from 50 to 80 increased total drive level from 116 to 186. Drive level on XTAL would have to be computed/measured.
Good is that Co is max 7pF. If it is little bit less , then you are safe.
Could you please confirm that in the Power calculator you need to use only the external capacitors value (CL1, CL2). I see in the Notes to the calculator that "CL1 and CL2 are external capacitors mounted on the circuit board plus parasitics." The parasitics can be several pFs, so the Drive level value can be considerably higher with that pFs added.