In the Cortex-A5 technical reference manual (TRM), there is an on-chip timer. This timer is clocked at the PERIPHCLK frequency which is ARM terminology. Is this clock the same a the Vybrid platform bus clock? Ie, the time base for the on-chip A5 timer is based on the 'bus clock'? The ARM TRM lists global timers, private timers and watchdog as being clocked by PERIPHCLK. I searched the main Vybrid documents for the signal name and have read the clock chapters several times, but I may have missed something.
I let the private timer run for ~35 minutes and PERIPHCLK appears to the same as the platform bus clock. From the same TRM, it seems that the GIC is clocked by the same PERIPHCLK and the Vybrid's A5 interrupt latency will be affected slightly by adjustments to the CCM and the platform bus clock. A more definitive source of information from a manual would be valuable.
Addendum: MQX use the global A5 timer as a system tick source (for the Vybrid-A5 PSP) and it uses the BUS clock as the clock source.
