How to boot PCM052 Vybrid board from QSPI NOR?

[mpfgregory]

I have to get rid of either the NAND or the QSPI NOR flash on my PCM052 Vybrid board to free some pins for other functionality. I have tried booting from NAND, but the boot time is worse than when booting from the SD card. I was told that the NOR flash would be much faster, but I can't find instructions how to boot from NOR. I guess it's quite similar to NAND boot since they're both MTD devices. I can write the kernel to the QSPI NOR flash using the flashcp command from mtd-utils, but I can't find the right commands to load the kernel from NOR in u-boot. I guess it should work with the cp.bwl command, but I don't know the address to use for NOR. Does anybody know how to access the QSPI NOR from u-boot?

In order to load u-boot from NAND you have to build a special u-boot.nand file with the toolchain and pad it with zeroes. What needs to be done to load u-boot from QSPI NOR?

My rootfs is currently too big to fit into 1 NOR bank, but it would fit into both. Is there a way to spread the rootfs over 2 partitions? I thought maybe it would be possible by using LVM.

[timesyssupport · Accepted solution]

Hi,

To Boot from QSPI NOR following are the high level steps to be followed. Please let me know if you have any questions about any of the steps or need more details:

1. Generate an uboot image that can boot from QSPI.

The Boot ROM will attempt to boot from QuadSPI flash if the "BOOT_CFG1[7:4]" fuses are programmed to "0000" as shown in the QuadSPI eFUSE Configuration table in the reference manual. Also it initializes the requested QuadSPI interface as selected in BOOT_CFG1[1]. The ROM also expects the QSPI configuration parameters to be present in the flash, hence the uboot image should include QuadSPI Configuration Parameters in the image from starting location of serial flash to the 318 byte offset. Below is the what is included in the QSPI Config parameters:

+typedef struct qspi_config_params{

+  uint32_t dqs_loopback;              //Sets DQS LoopBack Mode to enable Dummy Pad MCR[24]

+  uint32_t rsvd[4];

+  uint32_t cs_hold_time;              //CS hold time in terms of serial clock.(for example 1 serial clock cyle)

+  uint32_t cs_setup_time;             //CS setup time in terms of serial clock.(for example 1 serial clock cyle)

+  uint32_t sflash_A1_size;            //interms of Bytes

+  uint32_t sflash_A2_size;            //interms of Bytes

+  uint32_t sflash_B1_size;            //interms of Bytes

+  uint32_t sflash_B2_size;            //interms of Bytes

+  uint32_t sclk_freq;                     //In  00 - 22MHz, 01 - 66MHz, 10 - 80MHz, 11 - 104MHz (only for SDR Mode)

+  uint32_t rsvd5;                          //Reserved for Future Use

+  uint8_t sflash_type;                   //0-Single,1--Dual 2--Quad

+  uint8_t sflash_port;                   //0--Only Port-A,1--Both PortA and PortB

+  uint8_t ddr_mode_enable;        //Enable DDR mode if set to TRUE

+  uint8_t dqs_enable;                  //Enable DQS mode if set to TRUE.

+  uint8_t parallel_mode_enable;  //Enable Individual or parrallel mode.

+  uint8_t portA_cs1;

+  uint8_t portB_cs1;

+  uint8_t fsphs;

+  uint8_t fsdly;

+  uint8_t ddrsmp;

+  uint16_t  command_seq[128]; //set of seq to perform optimum read on SFLASH as as per vendor SFLASH

+

+  /* added to make even 0x400 size */

+  /* this is required to pad the memory space, so ivt starts at 0x400 */

+  uint8_t empty[0x2C0];

+} qspi_config_params;

Please tweak the above paramters based on the QSPI NOR Chip that is being used and the number of chips on board etc. Please refer to the attached patch (created for uboot version 2013.07), which inserts the given QuadSPI config params in the uboot.imx image.

2. Change the boot configuration on Vybrid to Boot from QSPI. (See Boot config section in Schematics of Vybrid TWR / Phytec)

3. Partition the Flash in the Kernel.

The QSPI flash can be partitioned in the kernel in several ways. One way is to partition it in the device tree - see example for Vybrid TWR device tree below (vf610-twr.dts):

&qspi0 {

  pinctrl-names = "default";

  pinctrl-0 = <&pinctrl_qspi0>;

  fsl,nor-size = <0x1000000>;

  fsl,spi-num-chipselects = <2>;

  status = "okay";

  flash0: s25fl128s@0 {

  #address-cells = <1>;

  #size-cells = <1>;

  compatible = "spansion,s25fl129p1";

  spi-max-frequency = <66000000>;

  reg = <0>;

  partition@0 {

  label = "s25fl128s-0-uboot";

  reg = <0x0 0x0100000>;

  };

  partition2@100000 {

  label = "s25fl128s-0-dtb";

  reg = <0x0100000 0x0100000>;

  };

  partition3@200000 {

  label = "s25fl128s-0-kernel";

  reg = <0x0200000 0x0500000>;

  };

  partition4@700000 {

  label = "s25fl128s-0-rfs";

  reg = <0x0600000 0x0900000>;

  };

  };

  flash1: s25fl128s@1 {

  #address-cells = <1>;

  #size-cells = <1>;

  compatible = "spansion,s25fl129p1";

  spi-max-frequency = <66000000>;

  reg = <1>;

  partition@0 {

  label = "s25fl128s-1";

  reg = <0x0 0x1000000>;

  };

  };

};

4. Boot the board from SD card to be able to write the uboot, kernel, dtb and fs to qspi flash.

5. Load & Write Kernel, Filesystem to the QSPI Flash

echo "erasing mtd4"

flash_erase /dev/mtd4 0 0

echo "erasing mtd5"

flash_erase /dev/mtd5 0 0

echo "erasing mtd6"

flash_erase /dev/mtd6 0 0

echo "erasing mtd7"

flash_erase /dev/mtd7 0 0

echo "writing uboot to spi flash offset 0"

nandwrite -p -m /dev/mtd4 /home/u-boot.imx

echo "writing device tree to spi flash offset 0x100000"

nandwrite -p -m /dev/mtd5 /home/vf610-twr.dtb

echo "writing kernel to spi flash offset 0x200000"

nandwrite -p -m /dev/mtd6 /home/uImage

4. Update Bootargs to boot kernel from QSPI Flash

setenv bootcmd "sf probe 0; sf probe 1; sf read 0x82000000 <dtb_partition_offset-0x100000> <size_of_dtb_file>; sf read 0x81000000 <dtb_partition_offset-0x200000> <size_of_kernel>; bootm 0x81000000 - 0x82000000"

Thanks,

Timesys Support

[mpfgregory]

Thanks for these instructions. The PCM-052 has micron SPI NOR flash. There's no driver for this flash in u-boot. Maybe one of the other drivers will work, but currently I don't have the time to try.

I had to make a decision in the meantime. I decided to keep the NAND and not use the NOR. Nevertheless thanks for your answer!

[karina_valencia]

timesyssupport​ can you attend this case?

[karina_valencia]

Timesys Support do you have an update?