Device tree creation for the vybrid vf6xx processor and mv88E3019 (Marvell).

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Device tree creation for the vybrid vf6xx processor and mv88E3019 (Marvell).

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Contributor II

Hello

I rebuilt Linux kernel 3.13 with Marvell drivers and created booting SD card for our device with vybrid vf6xx on board.

Now it is necessary to start network.

I created device tree for FEC ( I took TWR-VF65GS10  *.dts and *.dtsi files as an example).

in  vf610.dtsi:

fec0: ethernet@400d0000 {
compatible = "fsl,mvf600-fec";
reg = <0x400d0000 0x1000>;
interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_ENET0>,
<&clks VF610_CLK_ENET0>,
<&clks VF610_CLK_ENET>;
clock-names = "ipg", "ahb", "ptp";
status = "disabled";
};

fec1: ethernet@400d1000 {
compatible = "fsl,mvf600-fec";
reg = <0x400d1000 0x1000>;
interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_ENET1>,
<&clks VF610_CLK_ENET1>,
<&clks VF610_CLK_ENET>;
clock-names = "ipg", "ahb", "ptp";
status = "disabled";
};

in  vf610-twr.dts:

/*
&fec0 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec0>;
status = "okay";
};
*/
&fec1 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
status = "okay";
};

/*
pinctrl_fec0: fec0grp {
fsl,pins = <
VF610_PAD_PTA6__RMII_CLKIN 0x30d1
VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d3
VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d1
VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
>;
};
*/
pinctrl_fec1: fec1grp {
fsl,pins = <
VF610_PAD_PTA6__RMII_CLKOUT 0x30d2            //for 50 MHz reference clock
VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1
VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
>;
};

The result:

The MDC reference clock is present.

The 50 MHz clock rate  is absent.

Can somebody say what's wrong?

All necessary files are attached

Regards, Lyudmila.

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NXP TechSupport
NXP TechSupport

Hi Lyudmila

usually enet clock is configured in uboot, like

u-boot-timesys/vybrid.c at 2011.12-mvf · Timesys/u-boot-timesys · GitHub 

so one can try to set clock using sect.5.2.5.1 Software MUX Pad Control Register 0 (IOMUXC_PTA6)
(0x4004_8000h)

001 Select mux mode: ALT1 mux port: RMII_CLKOUT of instance: ccm.

https://www.nxp.com/docs/en/reference-manual/VFXXXRM.pdf 

Note, linux vybrid was developed and supported by timesys, not nxp.

Best regards
igor
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Contributor II

Hi

Is it necessary to add   VF610_CLK_ENET_50M  to the clocks list for  RMII_CLKOUT=50 MHz in RMII mode?

fec1: ethernet@400d1000 {
compatible = "fsl,mvf600-fec";
reg = <0x400d1000 0x1000>;
interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_ENET1>,
<&clks VF610_CLK_ENET1>,

<&clks VF610_CLK_ENET_50M>,          // for  RMII_CLKOUT=50 MHz???
<&clks VF610_CLK_ENET>;
clock-names = "ipg", "ahb", "ptp";
status = "disabled";
};

Does somebody know?

Thanks.

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