DDR3 of ECC/TWR-VF65GS10(rev.G).

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DDR3 of ECC/TWR-VF65GS10(rev.G).

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soichiyamamoto
Contributor V

Hi,

 

I use TWR-VF65GS10(rev.G).

And I use ECC option of DDR3.

 

I tested DDR3 in 'ecc_tests.c' which I attached. And there is no error.

 

The 'twrvf65gs10_ddr_ecc.mac'file which I attached is macro of IAR EWARM.

I carry out this macro before carrying out Program in DDR3.

However, Program is hung up on the way.

 

I want to know the reason.

 

Q1)

When I use ECC option of DDR3, is the setting of the 'twrvf65gs10_ddr_ecc.mac' file which I attached right?

Q2)

I enabled ECC option of DDR3, and have you moved Program? Or have you carried out Program such as U-Boot?

If there is Program at that time, give me it.

 

Best regards,

soichi

Original Attachment has been moved to: ecc_tests.c.zip

Original Attachment has been moved to: twrvf65gs10_ddr_ecc.mac.zip

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17 Replies

1,062 Views
karina_valencia
NXP Apps Support
NXP Apps Support

timesyssupport​ can you help to review this case?

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soichiyamamoto
Contributor V

Hi,

How about after that?

I want the answer to following question earlier.

Q2)

I enabled ECC option of DDR3, and have you moved Program? Or have you carried out Program such as U-Boot?

If there is Program at that time, give me it.

Best regards,

soichi

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1,062 Views
timesyssupport
Senior Contributor II

Hello Soichi,

I don't understand your prior question; Timesys Vybrid support assumes U-boot is present, Linux is running on the Cortex-A5, and MQX is running on the M4. An example of this for the Vybrid Tower is available at linuxlink.timesys.com - login with your user account, click on "Download BSP/SDK" and download the MCC demo for the Vybrid Tower. This includes a ping-pong demo described in the Vybrid MCC USer guide at the following page:

https://linuxlink.timesys.com/dev_center/freescale_vybrid

With regards to ECC in DDR, this is not currently supported, and at this time we do not have plans to do so; this thread provides some further information:

https://community.freescale.com/message/506001#506001

Regards,

Timesys Support

1,062 Views
soichiyamamoto
Contributor V

Hello Timesys Support and Karina Valencia Aguilar,

Thank you for an answer.

In some threads, I perform only the memory test of the ECC function of the DDR.

And I carried out the memory examination, too and was a success.

I referred to the following thread.

https://community.freescale.com/message/506001#506001

I enable ECC function of the DDR.(SRAM) And I load test Program for DDR. I operate test Program.
I tested the above.

However, I failed in movement.

Therefore I investigate it.

Q1)

Does the ECC function of the DDR support it in TWR-VF65GA10?

Q2)

>  I enable ECC function of the DDR.(SRAM) And I load test Program for DDR. I operate test Program.
>  I tested the above.

Plaease give me some advice In the test mentioned above.

Best regards,

soichi

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timesyssupport
Senior Contributor II

Hello Soichi,

Q1) DDR with ECC is not supported in Vybrid at this time. Please refer to the thread you link to, #506001

Q2) We will attempt to enable this in Uboot and test; if that proves to be functional, we will provide the necessary changes.

Regards,

Timesys Support

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karina_valencia
NXP Apps Support
NXP Apps Support

timesyssupport​ do you have an update?

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timesyssupport
Senior Contributor II

Hello,

soichiyamamoto​ and karinavalencia​ - we have determined which registers need set and will be booting and testing shortly; assuming U-boot is functional/bootable, we will pass that along.

Regards,

Timesys Support

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karina_valencia
NXP Apps Support
NXP Apps Support

timesyssupport​ do you have more information?

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timesyssupport
Senior Contributor II

Hello karinavalencia​ and soichiyamamoto​,

We have determine what registers need setting, but boot testing of U-boot with this enabled has not yet been completed.

I am hopeful we can pass something a long before the holiday.

Regards,

Timesys Support

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karina_valencia
NXP Apps Support
NXP Apps Support

timesyssupport​  do you have an update?

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timesyssupport
Senior Contributor II

Hello karinavalencia​ and Soichi,

The engineer assisting in this is off today for the Thanksgiving Holiday, we will follow up upon their return tomorrow.

Regards,

Timesys Support

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karina_valencia
NXP Apps Support
NXP Apps Support

timesyssupport​ do you have an update?

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karina_valencia
NXP Apps Support
NXP Apps Support

reminder

Timesys Support do you have an update?

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timesyssupport
Senior Contributor II

Hello soichiyamamoto​ and karinavalencia​,

Attempts to set the necessary registers to enable this resulted in a hanging U-boot. Unfortunately, as this is not supported, per previous threads requesting ECC enabled DDR, this will need to be investigated as a dedicated engineering effort and cannot be further investigated in this thread.

Regards,

Timesys Support

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karina_valencia
NXP Apps Support
NXP Apps Support

timesyssupport​  please continue with the follow up.

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timesyssupport
Senior Contributor II

Karina,

This looks to be IAR, which we are not able to support; soichiyamamoto​ - you are using IAR in this case, correct?

Thank you,

Timesys Support

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1,062 Views
soichiyamamoto
Contributor V

Hi,

Thank you.

Yes, it is IAR macro.

If it is macro of DS-5, will you support it?

Best Regards,

soichi

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