About capture the DCU CLK

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

About capture the DCU CLK

跳至解决方案
1,774 次查看
keisukewatanabe
Contributor III

Dear support,

I am going to connect to LCD at LVDS Transmitter.

The port of TWR uses the DCU0.

To capture the signal;

1. Is there a register to select the rising or falling edge of DCU0_PCLK?

2. Do I set to either?

Best regards,

Keisuke

标签 (1)
0 项奖励
回复
1 解答
1,619 次查看
naoumgitnik
Senior Contributor V

Dear Keisuke,

Please, take a look at the INV_PXCK bit of the Synchronize Polarity Register (DCUx_SYNPOL).

Best regards, Naoum Gitnik.

在原帖中查看解决方案

0 项奖励
回复
3 回复数
1,619 次查看
naoumgitnik
Senior Contributor V

Dear Keisuke,

Is this question about the Vybrid pin or the Tower board port's (connector's) pin, please?

Best regards,

0 项奖励
回复
1,619 次查看
keisukewatanabe
Contributor III

Dear Naoum,

>Is this question about the Vybrid pin or the Tower board port's (connector's) pin, please?


I want to know about the Vybrid.

Best regards,

Keisuke

0 项奖励
回复
1,620 次查看
naoumgitnik
Senior Contributor V

Dear Keisuke,

Please, take a look at the INV_PXCK bit of the Synchronize Polarity Register (DCUx_SYNPOL).

Best regards, Naoum Gitnik.

0 项奖励
回复