DDRv_results_revG_x_revH_TVR-VF65.xlsx

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DDRv_results_revG_x_revH_TVR-VF65.xlsx

DDRv_results_revG_x_revH_TVR-VF65.xlsx

Valid ranges of tuning parameters for different setting of CR132, PHYs ...

/Jiri

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It may be possible to improve the range of RD (CR105, CR110) using the 0x505 setting on board Rev H:

I would recommend changing PHY_RDLAT (DDRMC_CR126 bits [13:8]) = 0x9.

This should give the Read Burst one extra cycle to complete. This is important because using RDLAT_ADJ = 5 starts the Read timing for the pads one cycle earlier.

Cheers,

Mark

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Revision #:
1 of 1
Last update:
‎06-23-2016 09:07 AM
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