TLB1 Entry 0 Values after Reset (e5500 core)

[love_hate_and_repeat]

According to the e5500 core reference manual, there is a TLB1 entry present after reset. It also states that the upper 6 bits of the Real Page Number (RPN) are applied to the core by SoC. However, I couldn't find specific details about these 6 bits in T1040 reference manual. Could you clarify what these 6-bit values are for T1040 SoC? This information might be helpful to add to T1040 SoC documentation if it is missing.

Thank you.

[yipingwang]

The default RPN[28-51] in TLB1 entry0 after reset is fffff. So RPN[28-33] is "000011".

[love_hate_and_repeat]

@yipingwang thanks for the information, but could you please refer to where you found it in the reference manual? because I also knew it should be '00011" but it is not stated in the reference manual. please refer to the section in the reference manual.

[yipingwang · Accepted solution]

I got this information from our internal data base provided by the AE team.

[love_hate_and_repeat]

Why this information is not available in t1040 reference manual. This info can be added to the manual for its next revision.

Thanks.

[yipingwang]

Thanks for your suggestion, we will do.