T2081 based custom board hangs on usb start

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T2081 based custom board hangs on usb start

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francescocaiazz
Contributor II

Hello,

I'm trying to initialize usb controller in U-Boot, on a custom board, with usb start command. 

In the following the prints I have:

U-Boot 2016.092.0+ga06b209 (Feb 27 2018 - 19:46:07 +0100)

CPU0: T2081E, Version: 1.1, (0x85390011)
Core: e6500, Version: 2.0, (0x80400120)
Clock Configuration:
CPU0:1188 MHz, CPU1:1188 MHz, CPU2:1188 MHz, CPU3:1188 MHz,
CCB:594 MHz,
DDR:640 MHz (1280 MT/s data rate) (Asynchronous), IFC:594 MHz
FMAN1: 660 MHz
QMAN: 297 MHz
PME: 594 MHz
L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Reset Configuration Word (RCW):
00000000: 1208000a 12000000 00000000 40000000
00000010: bc000002 00404000 58110000 21000000
00000020: 00000000 00000000 00000000 002237fc
00000030: 00000000 5000000d 00000000 00000009
Board: T2081-MFB, boot from SPI
SERDES Reference Clocks:
SD1_CLK1=100.00MHZ, SD1_CLK2=100.00MHZ
I2C: ready
SPI: ready
DRAM: 2 GiB (DDR3, 64-bit, CL=9, ECC off)
Flash: 0 Bytes
L2: 2 MiB enabled
Corenet Platform Cache: 512 KiB enabled
Using SERDES1 Protocol: 188 (0xbc)
SEC0: RNG instantiated
NAND: 0 MiB
SF: Detected S25FL256S_64K with page size 256 Bytes, erase size 64 KiB, total 32 MiB
PCIe1: disabled
PCIe2: disabled
PCIe3: Root Complex, no link, regs @ 0xfe260000
PCIe3: Bus 00 - 00
PCIe4: Root Complex, no link, regs @ 0xfe270000
PCIe4: Bus 01 - 01
In: serial
Out: serial
Err: serial
Net:
FM1_DTSEC1: SGMII_1 on lane3(C)
FM1_DTSEC2: SGMII_2 on lane4(D)
SF: Detected S25FL256S_64K with page size 256 Bytes, erase size 64 KiB, total 32 MiB
Fman1: Uploading microcode version 106.4.18
FM1@DTSEC1 [PRIME], FM1@DTSEC2
Hit any key to stop autoboot: 0
=> usb start
starting USB...
USB0:

at this point the processor seems to be blocked, I can't interact through neither UART nor Jtag and the only action I can perform is a board reboot.

If I configure USB node in device tree, the same happens on linux, when init task starts the configuration of usb controller.

The sources I used as starting point are the one for T2080RDB, and regarding USB configuration I didn't change anything.

Here attached you can find the schematics for USB interface (only USB0 is connected, the other one is simply unconnected).

I made a check about all the frequencies configured within the system and everyone seems to be within the ranges.

Input frequencies for the processor are SYSCLK=66MHz, DDRCLK=80MHz and SD1PLL1CLK=SD1PLL2CLK=100MHz.

I have no idea of the reasons of such behavior. I hope someone could help me.

If you need more informations, please ask me.

Francesco

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Pavel
NXP Employee
NXP Employee

Check the USB_CLKIN signal. A write to registers in the USB controller memory map may cause the system to hang if there is no USB PHY clock.

Use the USBx_CONTROL[PHY_CLK_VALID] bit for checking USB PHY clock.


Have a great day,
Pavel Chubakov

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francescocaiazz
Contributor II

Hi Pavel,

thanks for the reply.

Here attached the signal measured on usb clk processor pin.

Could this be considered a valid clock signal?

up_usbclk_R107.png

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