WE are using a T2081 with on-board 4x DDR3L 4Gb 256Mx16/ MT41K256M16-1600 , so we do not have on-board SPD. Can you supply us data to fill the dimm_param_s data structure used by UBOOT ?
Best rgards
NXP SDK supports the T208xQDS and T208sRDB boards. U-boot for these boards uses SPD for DDR configuring.
See the t208xrdb.zip file in the attachment.
Find the following line in the ddr.h file:
static const struct board_specific_parameters udimm0[] = {
This structure contains the following parameters:
n_ranks, datarate_mhz_high, rank_gb, clk_adjust, wrlvl_start, wrlvl_ctl_2, wrlvl_ctl_3.
Look at the T1023RDB setting in the t102xrdb.h file. Find the CONFIG_SYS_DDR_RAW_TIMING in this file. This setting provides do not use SPD for DDR configuring. See the t102xrdb.h and ddr_t102xrdb.c files for the T102sRDB board from u-boot. See the ddr_raw_timing procedure in the ddr_t102xrdb.c file.
Use similar method for your T2081 board.
Have a great day,
Pavel Chubakov
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------