T2080RDB: vxWorks SMP boot problem from UBoot

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T2080RDB: vxWorks SMP boot problem from UBoot

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flabyjacob
Contributor III

Hi,

We are booting vxWorks from UBoot.

After enabling SMP options with windriver workbench, vxWorks is failing to enable logical CPU2 onwards(CPU2,CPU3,CPU4...).

Logical CPU0 and CPU1 are getting initialized successfully.

Please note,

The above discussed problem does not happen when vxWorks SMP is booted from 'vxWorks bootrom'

Can somebody help me to understand which configuration in UBoot makes vxWorks SMP to fail on T2080RDB EVM.

Regards

Flaby

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elsasnow
Contributor II

So Flaby, you were able to get VxW to boot via bootrom on the version 3 of the T2080RDB it appears?

Are you using the 'stock' BSP from Wind River for 6.9.4 or do you have a modified one?

From what I can tell, the one WR has posted does not support the T2080 V1.1 silicon without making some changes.

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flabyjacob
Contributor III

Hi Elsa,

Thanks for the reply...

Sorry for the delayed response...

We are using the default bsp supplied by WR.

Do you mean that stock bsp does not support  VxW SMP from UBoot?

FYI,

  • VxW SMP is booting from VxW bootrom without any fail.
  • Problem is in booting VxW SMP from the UBoot.

Please help me to get answer for the following two queries,

  1. Should I add something in bsp to help VxW SMP Image to boot from UBoot?
  2. target.ref of bsp explains how VxW bootrom can be booted from NOR Flash. But I want to boot VxW bootrom from NAND Flash of T2080RDB.How can I do the same on T2080RDB?

Thanks&Regards

Flaby

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elsasnow
Contributor II

Our problems lie with the BSP.  We suspect that it does not support V1.1 and the DDR3 SoDIMM used on Rev C of the T2080RDB.

It looks like your boot log shows this actually working, which is surprising.

Regarding boot, WRS has directed me to use a VxW bootrom instead of U-Boot.

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Flaby Jacob,

I am not familiar with WindRiver Vxworks, would you please provide the console log (including u-boot) to provide us some prompt information?

In addition, do you use the default u-boot from NXP released Linux SDK?

For boot Linux with u-boot, CPUs related parameters need to be defined in the dts file to pass to the boot loader when booting Linux.

In your Wxworks image, has the information related with logical CPU2 been defined?


Have a great day,
Yiping

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flabyjacob
Contributor III

Hello Yiping,

I am able to boot linux SMP on my custom board.

The below command on linux shows that only two cpus are enabled.

  • Can you please help me to understand why are the rest of cpus not listed if SMP is enabled?

/**************************************************************************************************/

root@t2080rdb:~# cat /proc/cpuinfo

processor       : 0

cpu             : e6500, altivec supported

clock           : 999.900000MHz

revision        : 2.0 (pvr 8040 0120)

processor       : 1

cpu             : e6500, altivec supported

clock           : 999.900000MHz

revision        : 2.0 (pvr 8040 0120)

timebase        : 29163750

platform        : CoreNet Generic

model           : fsl,T2080RDB

/**************************************************************************************************/

  • The bootlog as below shows, Brought up 2 CPUs

/**************************************************************************************************/

Linux version 3.12.37-rt51-QorIQ-SDK-V1.8+gf488de6 (samad@ubuntunzn) (gcc version 4.9.2 (GCC) ) #3 SMP Mon Jun 20 14:43:39 IST 2016

CF000012

Setup Arch

[boot]0012 Setup Arch

CoreNet Generic board from Freescale Semiconductor

Zone ranges:

  DMA      [mem 0x00000000-0x7fffffff]

  Normal   empty

Movable zone start for each node

Early memory node ranges

  node   0: [mem 0x00000000-0x7fffffff]

MMU: Allocated 2112 bytes of context maps for 255 contexts

CF000015

Setup Done

[boot]0015 Setup Done

PERCPU: Embedded 11 pages/cpu @c000000002800000 s15104 r0 d29952 u131072

Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 517120

Kernel command line: root=/dev/ram rw console=ttyS0,115200 init=/sbin/init

PID hash table entries: 4096 (order: 3, 32768 bytes)

Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)

Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)

Sorting __ex_table...

Memory: 1903612K/2097152K available (6892K kernel code, 1004K rwdata, 2472K rodata, 308K init, 757K bss, 193540K reserved)

Hierarchical RCU implementation.

        RCU debugfs-based tracing is enabled.

        CONFIG_RCU_FANOUT set to non-default value of 32

NR_IRQS:512 nr_irqs:512 16

mpic: Setting up MPIC " OpenPIC  " version 1.2 at ffe040000, max 8 CPUs

mpic: ISU size: 512, shift: 9, mask: 1ff

mpic: Initializing for 512 sources

clocksource: timebase mult[112502a5] shift[23] registered

Console: colour dummy device 80x25

pid_max: default: 32768 minimum: 301

Mount-cache hash table entries: 256

mpic: requesting IPIs...

e6500 family performance monitor hardware support registered

Brought up 2 CPUs

devtmpfs: initialized

xor: measuring software checksum speed

   8regs     :  2022.000 MB/sec

   8regs_prefetch:  1782.000 MB/sec

   32regs    :  1699.000 MB/sec

   32regs_prefetch:  1497.000 MB/sec

xor: using function: 8regs (2022.000 MB/sec)

/**************************************************************************************************/

  • Can you please help me to solve this issue?
  • The problem of enabling only two cpus is common when board is booted with linux or vxWorks from UBoot.
  • That means, is  problem with the UBoot?

Regards

Flaby

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flabyjacob
Contributor III

Hello Yiping,

I am trying to boot linux on my custom board(T2080RDB based) I am using the uImage binary, dtb file and rootfs suppiled by the SDK-v1.8 for booting,

Should I disable/enable something in the kernel/rootfs before booting them from the custom board?

With the SDK supplied files, booting hangs. Please see the log,

/*******************************************************************************************************************************************************/

Linux version 3.12.37-rt51-QorIQ-SDK-V1.8+gf488de6 (jenkins@ceres) (gcc version 4.9.2 (GCC) ) #1 SMP Sun Jun 14 06:35:49 CST 2015

CF000012

Setup Arch

[boot]0012 Setup Arch

CoreNet Generic board from Freescale Semiconductor

Zone ranges:

  DMA      [mem 0x00000000-0x7fffffff]

  Normal   empty

Movable zone start for each node

Early memory node ranges

  node   0: [mem 0x00000000-0x7fffffff]

MMU: Allocated 2112 bytes of context maps for 255 contexts

CF000015

Setup Done

[boot]0015 Setup Done

PERCPU: Embedded 11 pages/cpu @c000000002900000 s15104 r0 d29952 u131072

Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 517120

Kernel command line: root=/dev/ram rw ramdisk_size=70000000 console=ttyS0,115200

PID hash table entries: 4096 (order: 3, 32768 bytes)

Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)

Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)

Sorting __ex_table...

Memory: 1870072K/2097152K available (7472K kernel code, 1100K rwdata, 2716K rodata, 320K init, 762K bss, 227080K reserved)

Hierarchical RCU implementation.

    RCU debugfs-based tracing is enabled.

    CONFIG_RCU_FANOUT set to non-default value of 32

    RCU restricting CPUs from NR_CPUS=24 to nr_cpu_ids=8.

NR_IRQS:512 nr_irqs:512 16

mpic: Setting up MPIC " OpenPIC  " version 1.2 at ffe040000, max 8 CPUs

mpic: ISU size: 512, shift: 9, mask: 1ff

mpic: Initializing for 512 sources

clocksource: timebase mult[112502a5] shift[23] registered

Console: colour dummy device 80x25

pid_max: default: 32768 minimum: 301

Mount-cache hash table entries: 256

mpic: requesting IPIs...

e6500 family performance monitor hardware support registered

Brought up 2 CPUs

devtmpfs: initialized

xor: measuring software checksum speed

   8regs     :  2022.000 MB/sec

   8regs_prefetch:  1783.000 MB/sec

   32regs    :  1699.000 MB/sec

   32regs_prefetch:  1497.000 MB/sec

xor: using function: 8regs (2022.000 MB/sec)

NET: Registered protocol family 16

Found FSL PCI host bridge at 0x0000000ffe240000. Firmware bus number: 0->0

PCI host bridge /pcie@ffe240000  ranges:

MEM 0x0000000c00000000..0x0000000c1fffffff -> 0x00000000e0000000

  IO 0x0000000ff8000000..0x0000000ff800ffff -> 0x0000000000000000

/pcie@ffe240000: PCICSRBAR @ 0xdf000007

EDAC PCI0: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV 'ffe240000.pcie' (INTERRUPT)

MPC85xx_edac acquired irq 20 for PCI Err

MPC85xx_edac PCI err registered

Found FSL PCI host bridge at 0x0000000ffe260000. Firmware bus number: 0->0

PCI host bridge /pcie@ffe260000  ranges:

MEM 0x0000000c30000000..0x0000000c3fffffff -> 0x00000000e0000000

  IO 0x0000000ff8020000..0x0000000ff802ffff -> 0x0000000000000000

/pcie@ffe260000: PCICSRBAR @ 0xff000007

EDAC PCI1: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV 'ffe260000.pcie' (INTERRUPT)

MPC85xx_edac acquired irq 22 for PCI Err

MPC85xx_edac PCI err registered

Found FSL PCI host bridge at 0x0000000ffe270000. Firmware bus number: 0->0

PCI host bridge /pcie@ffe270000  ranges:

MEM 0x0000000c40000000..0x0000000c4fffffff -> 0x00000000e0000000

  IO 0x0000000ff8030000..0x0000000ff803ffff -> 0x0000000000000000

/pcie@ffe270000: PCICSRBAR @ 0xff000007

EDAC PCI2: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV 'ffe270000.pcie' (INTERRUPT)

MPC85xx_edac acquired irq 23 for PCI Err

MPC85xx_edac PCI err registered

PCI: Probing PCI hardware

fsl-pci ffe240000.pcie: PCI host bridge to bus 0000:00

pci_bus 0000:00: root bus resource [io  0x10000-0x1ffff] (bus address [0x0000-0xffff])

pci_bus 0000:00: root bus resource [mem 0xc00000000-0xc1fffffff] (bus address [0xe0000000-0xffffffff])

pci_bus 0000:00: root bus resource [bus 00]

pci 0000:00:00.0: ignoring class 0x0b2000 (doesn't match header type 01)

pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring

pci 0000:00:00.0: PCI bridge to [bus 01-ff]

fsl-pci ffe260000.pcie: PCI host bridge to bus 0001:00

pci_bus 0001:00: root bus resource [io  0x21000-0x30fff] (bus address [0x0000-0xffff])

pci_bus 0001:00: root bus resource [mem 0xc30000000-0xc3fffffff] (bus address [0xe0000000-0xefffffff])

pci_bus 0001:00: root bus resource [bus 00]

pci 0001:00:00.0: ignoring class 0x0b2000 (doesn't match header type 01)

pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring

pci 0001:00:00.0: PCI bridge to [bus 01-ff]

fsl-pci ffe270000.pcie: PCI host bridge to bus 0002:00

pci_bus 0002:00: root bus resource [io  0x32000-0x41fff] (bus address [0x0000-0xffff])

pci_bus 0002:00: root bus resource [mem 0xc40000000-0xc4fffffff] (bus address [0xe0000000-0xefffffff])

pci_bus 0002:00: root bus resource [bus 00]

pci 0002:00:00.0: ignoring class 0x0b2000 (doesn't match header type 01)

pci 0002:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring

pci 0002:00:00.0: PCI bridge to [bus 01-ff]

pci 0000:00:00.0: PCI bridge to [bus 01]

pci 0000:00:00.0:   bridge window [io  0x10000-0x1ffff]

pci 0000:00:00.0:   bridge window [mem 0xc00000000-0xc1fffffff]

pci 0001:00:00.0: PCI bridge to [bus 01]

pci 0001:00:00.0:   bridge window [io  0x21000-0x30fff]

pci 0001:00:00.0:   bridge window [mem 0xc30000000-0xc3fffffff]

pci 0002:00:00.0: PCI bridge to [bus 01]

pci 0002:00:00.0:   bridge window [io  0x32000-0x41fff]

pci 0002:00:00.0:   bridge window [mem 0xc40000000-0xc4fffffff]

bio: create slab <bio-0> at 0

raid6: altivecx1   603 MB/s

raid6: altivecx2  1006 MB/s

raid6: altivecx4  1662 MB/s

raid6: altivecx8  1630 MB/s

raid6: int64x1    282 MB/s

raid6: int64x2    474 MB/s

raid6: int64x4    729 MB/s

raid6: int64x8    637 MB/s

raid6: using algorithm altivecx4 (1662 MB/s)

raid6: using intx1 recovery algorithm

vgaarb: loaded

SCSI subsystem initialized

usbcore: registered new interface driver usbfs

usbcore: registered new interface driver hub

usbcore: registered new device driver usb

pps_core: LinuxPPS API ver. 1 registered

pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>

PTP clock support registered

EDAC MC: Ver: 3.0.0

Bman err interrupt handler present

Bman portal initialised, cpu 0

Bman portal initialised, cpu 1

Bman portal initialised, cpu 2

Bman portal initialised, cpu 3

Bman portal initialised, cpu 4

Bman portal initialised, cpu 5

Bman portal initialised, cpu 6

Bman portal initialised, cpu 7

Bman portals initialised

Qman err interrupt handler present

QMan: Allocated lookup table at 8000000000000000, entry count 65537

Qman portal initialised, cpu 0

Qman portal initialised, cpu 1

Qman portal initialised, cpu 2

Qman portal initialised, cpu 3

Qman portal initialised, cpu 4

Qman portal initialised, cpu 5

Qman portal initialised, cpu 6

Qman portal initialised, cpu 7

Qman portals initialised

Bman: BPID allocator includes range 32:32

Qman: FQID allocator includes range 256:512

Qman: FQID allocator includes range 32768:32768

Qman: CGRID allocator includes range 0:256

Qman: pool channel allocator includes range 1025:15

fsl-ifc ffe124000.localbus: Freescale Integrated Flash Controller

Switched to clocksource timebase

NET: Registered protocol family 2

TCP established hash table entries: 16384 (order: 6, 262144 bytes)

TCP bind hash table entries: 16384 (order: 6, 262144 bytes)

TCP: Hash tables configured (established 16384 bind 16384)

TCP: reno registered

UDP hash table entries: 1024 (order: 3, 32768 bytes)

UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes)

NET: Registered protocol family 1

RPC: Registered named UNIX socket transport module.

RPC: Registered udp transport module.

RPC: Registered tcp transport module.

RPC: Registered tcp NFSv4.1 backchannel transport module.

Trying to unpack rootfs image as initramfs...

rootfs image is not initramfs (no cpio magic); looks like an initrd

Freeing initrd memory: 35640K (c00000002dd31000 - c00000002ffff000)

audit: initializing netlink socket (disabled)

type=2000 audit(1.360:1): initialized

HugeTLB registered 1 MB page size, pre-allocated 0 pages

HugeTLB registered 4 MB page size, pre-allocated 0 pages

HugeTLB registered 16 MB page size, pre-allocated 0 pages

HugeTLB registered 64 MB page size, pre-allocated 0 pages

HugeTLB registered 256 MB page size, pre-allocated 0 pages

HugeTLB registered 1 GB page size, pre-allocated 0 pages

NFS: Registering the id_resolver key type

Key type id_resolver registered

Key type id_legacy registered

NTFS driver 2.1.30 [Flags: R/O].

jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.

msgmni has been set to 3850

io scheduler noop registered

io scheduler deadline registered

io scheduler cfq registered (default)

Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled

serial8250.0: ttyS0 at MMIO 0xffe11c500 (irq = 36, base_baud = 14581875) is a 16550A

console [ttyS0] enabled, bootconsole disabled

console [ttyS0] enabled, bootconsole disabled

serial8250.0: ttyS1 at MMIO 0xffe11c600 (irq = 36, base_baud = 14581875) is a 16550A

serial8250.0: ttyS2 at MMIO 0xffe11d500 (irq = 37, base_baud = 14581875) is a 16550A

serial8250.0: ttyS3 at MMIO 0xffe11d600 (irq = 37, base_baud = 14581875) is a 16550A

ePAPR hypervisor byte channel driver

brd: module loaded

loop: module loaded

st: Version 20101219, fixed bufsize 32768, s/g segs 256

fsl-sata ffe220000.sata: Sata FSL Platform/CSB Driver init

scsi0 : sata_fsl

ata1: SATA max UDMA/133 irq 68

fsl-sata ffe221000.sata: Sata FSL Platform/CSB Driver init

scsi1 : sata_fsl

ata2: SATA max UDMA/133 irq 69

of-flash fe8000000.nor: do_map_probe() failed

ONFI param page 0 valid

ONFI flash detected

NAND device: Manufacturer ID: 0x2c, Chip ID: 0xac (Micron MT29F4G08ABBDAH4), 512MiB, page size: 2048, OOB size: 64

Bad block table found at page 262080, version 0x01

Bad block table found at page 262016, version 0x01

fsl,ifc-nand fff800000.nand: IFC NAND device at 0xfff800000, bank 0

fsl_espi ffe110000.spi: master is unqueued, this is deprecated

m25p80 spi32766.0: unrecognized JEDEC id ffffff

fsl_espi ffe110000.spi: at 0x80000800801b6000 (irq = 53)

libphy: Fixed MDIO Bus: probed

libphy: Freescale XGMAC MDIO Bus: probed

mdio_bus ffe4fc000: cannot get PHY at address 2

libphy: Freescale XGMAC MDIO Bus: probed

mdio_bus ffe4fd000: cannot get PHY at address 12

mdio_bus ffe4fd000: cannot get PHY at address 13

mdio_bus ffe4fd000: cannot get PHY at address 0

mdio_bus ffe4fd000: cannot get PHY at address 1

libphy: Freescale XGMAC MDIO Bus: probed

libphy: Freescale XGMAC MDIO Bus: probed

libphy: Freescale XGMAC MDIO Bus: probed

libphy: Freescale XGMAC MDIO Bus: probed

libphy: Freescale XGMAC MDIO Bus: probed

libphy: Freescale XGMAC MDIO Bus: probed

libphy: Freescale XGMAC MDIO Bus: probed

libphy: Freescale XGMAC MDIO Bus: probed

cpu0/0: > WARNING (FM) [CPU00, drivers/net/ethernet/freescale/fman/Peripherals/FM/fm.c:3536 FM_Init]:

cpu0/0: Hack: No FM reset!

cpu0/0:

Freescale FM module (Jun 14 2015:06:35:30), FMD API version 21.1.0

Freescale FM Ports module (Jun 14 2015:06:35:31)

fsl_mac: fsl_mac: FSL FMan MAC API based driver ()

fsl_mac ffe4e0000.ethernet: FMan MEMAC

fsl_mac ffe4e0000.ethernet: FMan MAC address: 00:04:9f:03:a1:a5

fsl_mac ffe4e4000.ethernet: FMan MEMAC

fsl_mac ffe4e4000.ethernet: FMan MAC address: 00:04:9f:03:a3:a7

fsl_mac ffe4e6000.ethernet: FMan MEMAC

fsl_mac ffe4e6000.ethernet: FMan MAC address: 00:04:9f:03:a3:a8

fsl_mac ffe4e8000.ethernet: No PHY (or fixed link) found

fsl_mac: probe of ffe4e8000.ethernet failed with error -22

fsl_mac ffe4ea000.ethernet: of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@ea000) failed

fsl_mac: probe of ffe4ea000.ethernet failed with error -22

fsl_dpa: FSL DPAA Ethernet driver ()

fsl_dpa: FSL DPAA Ethernet debugfs entries ()

fsl_dpa: fsl_dpa: Probed interface eth0

fsl_dpa: fsl_dpa: Probed interface eth1

fsl_dpa ethernet.18: dev_get_drvdata(ffe4e8000.ethernet) failed

fsl_dpa: probe of ethernet.18 failed with error -22

fsl_dpa ethernet.19: dev_get_drvdata(ffe4ea000.ethernet) failed

fsl_dpa: probe of ethernet.19 failed with error -22

fsl_advanced: FSL DPAA Advanced drivers: ()

fsl_proxy: FSL DPAA Proxy initialization driver ()

fsl_dpa_shared: FSL DPAA Shared Ethernet driver ()

fsl_dpa_macless: FSL DPAA MACless Ethernet driver ()

fsl_oh: FSL FMan Offline Parsing port driver ()

e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k

e1000e: Copyright(c) 1999 - 2013 Intel Corporation.

fsl-of-dma ffe100300.dma: dma channel dma-uio0-0 initialized

fsl-of-dma ffe100300.dma: dma channel dma-uio0-1 initialized

fsl-of-dma ffe100300.dma: dma channel dma-uio0-2 initialized

fsl-of-dma ffe100300.dma: dma channel dma-uio0-3 initialized

fsl-of-dma ffe100300.dma: dma channel dma-uio0-4 initialized

fsl-of-dma ffe100300.dma: dma channel dma-uio0-5 initialized

fsl-of-dma ffe100300.dma: dma channel dma-uio0-6 initialized

fsl-of-dma ffe100300.dma: dma channel dma-uio0-7 initialized

fsl-of-dma ffe101300.dma: dma channel dma-uio1-0 initialized

fsl-of-dma ffe101300.dma: dma channel dma-uio1-1 initialized

fsl-of-dma ffe101300.dma: dma channel dma-uio1-2 initialized

fsl-of-dma ffe101300.dma: dma channel dma-uio1-3 initialized

fsl-of-dma ffe101300.dma: dma channel dma-uio1-4 initialized

fsl-of-dma ffe101300.dma: dma channel dma-uio1-5 initialized

fsl-of-dma ffe101300.dma: dma channel dma-uio1-6 initialized

fsl-of-dma ffe101300.dma: dma channel dma-uio1-7 initialized

fsl-of-dma ffe102300.dma: dma channel dma-uio2-0 initialized

fsl-of-dma ffe102300.dma: dma channel dma-uio2-1 initialized

fsl-of-dma ffe102300.dma: dma channel dma-uio2-2 initialized

fsl-of-dma ffe102300.dma: dma channel dma-uio2-3 initialized

fsl-of-dma ffe102300.dma: dma channel dma-uio2-4 initialized

fsl-of-dma ffe102300.dma: dma channel dma-uio2-5 initialized

fsl-of-dma ffe102300.dma: dma channel dma-uio2-6 initialized

fsl-of-dma ffe102300.dma: dma channel dma-uio2-7 initialized

ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver

ehci-pci: EHCI PCI platform driver

/************************************************            HANGS HERE              ***********************************************************************/

I have a yocto build setup to build the kernel

Regards

Flaby

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pushpamanjunath
Contributor I

Hi Flaby,

I am also facing the same problem on T2080 custom board, kernel hangs at the same point.

Can i know how you solved it?

Regards,

Pushpa

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flabyjacob
Contributor III

Sorry Yiping,

I missed attachment in the last reply

Please find it here

U-Boot 2015.01QorIQ-SDK-V1.8+g6ba8eed (Jun 14 2015 - 06:33:44)

CPU0:  T2080E, Version: 1.1, (0x85380011)

Core:  e6500, Version: 2.0, (0x80400120)

Clock Configuration:

       CPU0:1799.820 MHz, CPU1:1799.820 MHz, CPU2:1799.820 MHz, CPU3:1799.820 MHz,

       CCB:599.940 MHz,

       DDR:933.310 MHz (1866.620 MT/s data rate) (Asynchronous), IFC:149.985 MHz

       FMAN1: 699.930 MHz

       QMAN:  299.970 MHz

       PME:   599.940 MHz

L1:    D-cache 32 KiB enabled

       I-cache 32 KiB enabled

Reset Configuration Word (RCW):

       00000000: 1207001b 15000000 00000000 00000000

       00000010: 66150002 00000000 ec027000 c1000000

       00000020: 00800000 00000000 00000000 000307fc

       00000030: 00000000 00000000 00000000 00000004

Board: T2080RDB, Board rev: 0x01 CPLD ver: 0x03, boot from NOR vBank0

SERDES Reference Clocks:

SD1_CLK1=156.25MHZ, SD1_CLK2=100.00MHZ

SD2_CLK1=100.00MHZ, SD2_CLK2=100.00MHZ

I2C:   ready

SPI:   ready

DRAM:  Initializing....using SPD

Detected UDIMM D3XP56082XL10AA  

2 GiB left unmapped

4 GiB (DDR3, 64-bit, CL=13, ECC on)

       DDR Chip-Select Interleaving Mode: CS0+CS1

VID: Could not find voltage regulator on I2C.

Warning: Adjusting core voltage failed.

Flash: 128 MiB

L2:    2 MiB enabled

Corenet Platform Cache: 512 KiB enabled

Using SERDES1 Protocol: 102 (0x66)

Using SERDES2 Protocol: 21 (0x15)

SEC0: RNG instantiated

NAND:  512 MiB

MMC:   FSL_SDHC: 0

EEPROM: Invalid ID (ff ff ff ff)

PCIe1: Endpoint, undetermined, regs @ 0xfe240000

PCIe1: Bus 00 - 00

PCIe2: Root Complex, x2 gen2, regs @ 0xfe250000

  02:00.0     - 1957:0808 - Processor

PCIe2: Bus 01 - 02

PCIe3: disabled

PCIe4: Root Complex, no link, regs @ 0xfe270000

PCIe4: Bus 03 - 03

In:    serial

Out:   serial

Err:   serial

Net:   Fman1: Uploading microcode version 106.4.15

PHY reset timed out

PHY reset timed out

FM1@DTSEC3, FM1@DTSEC4 [PRIME], FM1@TGEC1, FM1@TGEC2, FM1@TGEC3, FM1@TGEC4

Hit any key to stop autoboot:  3  2  0

=> setenv bootargs 'memac(2,0)host:vxWorks h=200.168.1.13 e=200.168.1.14 u=vxworks pw=vxworks f=0x0'

=> tftp vxWorks

Using FM1@DTSEC4 device

TFTP from server 200.168.1.13; our IP address is 200.168.1.14

Filename 'vxWorks'.

Load address: 0x1000000

Loading: *#################################################################

     #################################################################

     #################################################################

     ##################################

     5.2 MiB/s

done

Bytes transferred = 3358176 (333de0 hex)

=> bootv

## Ethernet MAC address not copied to NV RAM

## Using bootline (@ 0x4200): memac(2,0)host:vxWorks h=200.168.1.13 e=200.168.1.14 u=vxworks pw=vxworks f=0x0

## Starting vxWorks at 0x00100000 ...

Target Name: vxTarget

0x82c3640 (tRootTask): kernelCpuEnableInternal: pExcStackBase : 0x82a5dd0

0x82c3640 (tRootTask): kernelCpuEnableInternal: pExcStackBase : 0x82a9430

0x82c3640 (tRootTask): usrEnableCpu: error when enabling additional CPU: 2

userEnableCpu: kernelCpuEnableInternal() failed

0x82c3640 (tRootTask): kernelCpuEnableInternal: pExcStackBase : 0x82aca90

0x82c3640 (tRootTask): Error: CPU2 must be enabled before CPU3

0x82c3640 (tRootTask): usrEnableCpu: error when enabling additional CPU: 3

userEnableCpu: kernelCpuEnableInternal() failed

Add0xing 82c36407342 ( symbols for standalone.

tRootTask): kernelCpuEnableInternal: pExcStackBase : 0x82b00f0

                VxW0xorks82c3640

(CopyritRootTaskght 1984-): 2016usrEnableCpu: error wh  Wind River Systems, en enabling additionalInc.

CPU:             4 CPU:

userEnableCpu: kernelCpuEnableInternalFreescale QorIQ T2080()

failed

    Runtime Name: 0xVxWorks82c3640

( RutRootTaskntime Version:):  kernelCpuEnableIntern6.9 SMPal: pExcStackBas

e :      BSP version: 6.9/0

0x         Created:82b3750

Apr 13 2016 20:00x8:2682c3640

(ED&R Politcy Mode: RootTaskDepl): oyedError: CPU

4   WDB  Comm Type: must be WDB_COMM_ENDenabled bef

ore CPU             W5DB:

Agent Disabled.

0x82c3640 (tRootTask): usrEnableCpu: error when enabling additional CPU: 5

userEnableCpu: kernelCpuEnableInternal() failed

0x82c3640 (): task dead

usrEnableCpu: error when enabling additional CPU: 7

userEnableCpu: kernelCpuEnableInternal() failed

->

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flabyjacob
Contributor III

Hello Yiping,

Thanks a lot...

Sorry for the delayed response...

  1. I have attached the log (UBoot & vxWorks)
  2. Yes, we are using default UBoot programmed in NOR Flash of T2080RDB
  3. I am not that familiar to vxWorks source code. I will check it and get back to you

Regards

Flaby

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