Is it possible in the PBI for the T2080 to issue I2C commands through the T2080s I2C UART. The registers for the I2C are in the CCSR space so they are accessible. We are not using the I2C for RCW, PBI or Boot. We are reading RCW and PBI from SPI and will boot from parallel NOR flash. I understand that the PBI is not capable of detecting arbitration, or correct acknowledgements from the device, so it would be making the assumption that the transactions complete successfully. But using a combination of writes, flushes, and waits would it be possible?
Described approach never was implemented and/or tested by NXP.
Without verification it is impossible to state whether it could be operational.