T1040RDB: UCC1 configured as HDLC

[suchitasharma]

Hi,

We are using T1040RDB based board and we want to configure UCC1 for HDLC

As we can see in the dts file the node is :

ucc1: ucc@2000 {
compatible = "fsl,ucc_hdlc";
rx-clock-name = "clk12";
tx-clock-name = "brg2";
}

But when we probe we are not able to observer any clock on pin P4 which is configured as BRGO2. Is there any additional configuration required?

Also other than the dts file is there any specific configuration required for selecting UCC input clock?

[suchitasharma]

Hi,

We are using T1040RDB based board and we want to configure UCC1 for HDLC

As we can see in the dts file the node is :

ucc1: ucc@2000 {
compatible = "fsl,ucc_hdlc";
rx-clock-name = "clk12";
tx-clock-name = "brg2";
}

But when we probe we are not able to observer any clock on pin P4 which is configured as BRGO2. Is there any additional configuration required?

Also other than the dts file is there any specific configuration required for selecting UCC input clock?

[suchitasharma]

Hi,

We are using T1040RDB based board and we want to configure UCC1 for HDLC

As we can see in the dts file the node is :

ucc1: ucc@2000 {
compatible = "fsl,ucc_hdlc";
rx-clock-name = "clk12";
tx-clock-name = "brg2";
}

But when we probe we are not able to observer any clock on pin P4 which is configured as BRGO2. Is there any additional configuration required?

Also other than the dts file is there any specific configuration required for selecting UCC input clock?

[Pavel]

See attached documentation about using brg in dts file.

See also .dts file in the attachment.