T1040 with SGMII on VSC8572 u-boot bring up

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T1040 with SGMII on VSC8572 u-boot bring up

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Contributor I

I have a T1040 based board. it connected to PHY:

The board has U-boot on SPI. Lets name it "UBOOT1"

U-Boot 2016.012.0.2+g0c5e4cc (Oct 05 2017 - 14:30:44 +0500)

CPU0: T1040, Version: 1.1, (0x85200011)
Core: e5500, Version: 2.1, (0x80241021)
Single Source Clock Configuration
Clock Configuration:
CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz,
CCB:600 MHz,
DDR:800 MHz (1600 MT/s data rate) (Asynchronous), IFC:150 MHz
QE:300 MHz
FMAN1: 600 MHz
QMAN: 300 MHz
PME: 300 MHz
L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Reset Configuration Word (RCW):
00000000: 0c10000f 0f000000 00000000 00000000
00000010: 69000002 00000812 6c104000 21000000
00000020: 00000000 00000000 60000000 0022e774
00000030: 00000714 90165a65 00000000 00000000

=> mdio list
FSL_MDIO0:
1 - Vitesse VSC8531 <--> FM1@DTSEC5
4 - Vitesse VSC8572 <--> FM1@DTSEC3
5 - Vitesse VSC8572 <--> FM1@DTSEC4

=> ping 192.168.13.102

Using FM1@DTSEC4 device
host 192.168.13.102 is alive

=> ping 192.168.13.102
Using FM1@DTSEC5 device
host 192.168.13.102 is alive
=>

 

I am trying to rebuild Uboot. I get last uboot sources and do configure and compilation. Lets name it UBOOT2.

The same configuration. There was no drivers for this PHY 8572 so i just use standart conf in vitesse.c

static struct phy_driver VSC8572_driver = {

.name = "Vitesse VSC8572",
.uid = 0x704d0,
.mask = 0xffff0,
.features = PHY_GBIT_FEATURES,
.config = &vsc8572_config,
.startup = &vitesse_startup,
.shutdown = &genphy_shutdown,
};

static struct phy_driver VSC8531_driver = {

.name = "Vitesse VSC8531",
.uid = 0x70570,
.mask = 0xffff0,
.features = PHY_GBIT_FEATURES,
.config = &vitesse_config,
.startup = &vitesse_startup,
.shutdown = &genphy_shutdown,
};

U-Boot 2020.04-00010-ge2cb327-dirty (Sep 14 2020 - 12:31:56 +0500)

CPU0: T1040, Version: 1.1, (0x85200011)
Core: e5500, Version: 2.1, (0x80241021)
Single Source Clock Configuration
Clock Configuration:
CPU0:1000 MHz, CPU1:1000 MHz, CPU2:1000 MHz, CPU3:1000 MHz,
CCB:400 MHz,
DDR:500 MHz (1000 MT/s data rate) (Asynchronous), IFC:200 MHz
QE:200 MHz
FMAN1: 400 MHz
QMAN: 200 MHz
PME: 200 MHz
L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Reset Configuration Word (RCW):
00000000: 080a000a 0a000000 00000000 00000000
00000010: 69000002 00000812 6c104000 21000000
00000020: 00000000 00000000 60000000 0022e774
00000030: 00000714 90165a65 00000000 00000000

 

I DO SOFT RESET BY  CODEWARIOR AND MY UBOOT2 DO  WORK!!!

 

=> ping 192.168.13.102

Using FM1@DTSEC4 device
host 192.168.13.102 is alive

I DO HARD RESET  MY UBOOT2 DOES NOT  WORK!!!

=> ping 192.168.13.102

Using FM1@DTSEC4 device

ARP Retry count exceeded; starting again
ping failed; host 192.168.13.102 is not alive
=>

 

I made dumps of PHY and T1040 registers in both cases.

the differens is not to big.

 

  UBOOT1 UBOOT2
CCMCCM_CECA2R0x00000013 0x00000011
SerDesSerDes_SGMIIDCR10x0000087F 0x000008BF
SerDesSerDes_LN1GCR10x001C4011 0x101C4011
SerDesSerDes_LN1RECR10x0F0F1008 0x0F0F0F88
SerDesSerDes_LN1TCSR30x08000000 0x04000000
SerDesSerDes_LN3RECR10x0F000E08 0x0F000D88
SerDesSerDes_LN6GCR10x001C4011 0x101C4011
SerDesSerDes_LN6RECR10x0F0F1008 0x0F0F0F88
SerDesSerDes_LN6TCSR30x08000000 0x04000000
ES_QSYS_HSCHES_QSYS_HSCH_CIR_STATE0x0000000E 0x00000007

 

PHYS registers the same exept RO status registers says no SGMII links.

 

can yo help me where the dog was buried,and how to make UBOOT2 work?

 

 

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