Hi,
In one of our custom board using T1024 Processor received today ,after testing processor has come out of reset and able to connect through JTAG using CW with hardcoded HRCW. and able to access DDR using JTAG intialization file(DDR walk test also passing).
We tried fusing NOR flash using SRAM file and flash erase itself is failing..After further debugging we found that IFC_CLK itself is not coming from T1024.
Kindly help us in resolving this issue .
Regards,
suresh
Do you see activity of other IFC control signals?
Please note that the IFC clock is active only when there is any access on GPCM or synchronous NOR.