Hi all,
We are working on a custom board with T2081 SOC. I am new to the Tseries chip and when I go through the RM, I came across following section, "Boot Space Translation" where it is mentioned that
```
When each core comes out of reset, its MMU has one 4 KB page defined at
0x0_FFFF_Fnnn. Each core begins execution with the instruction at effective address
0x0_FFFF_FFFC. To get this instruction, the core's first instruction fetch is a burst read
of boot code from effective address 0x0_FFFF_FFC0
```
So my question is, If I flash u-boot binary in NOR flash, how the core knows about the exact address of NOR flash to load u-boot image from NOR flash address and load to DDR.
Is there any register or configuration which instructs PC to jump to u-boot vector address and starts loading u-boot from NOR address when core begins execution at 0x0_FFFF_FFFC?
Thanks,
Noufal P
已解决! 转到解答。
For boot from NOR flash, the system always fetches the first instruction from the end of NOR flash.
You need to build u-boot image to configure reset vector at the end of NOR flash. For example:
#ifndef CONFIG_RESET_VECTOR_ADDRESS
#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
#endif
#define CONFIG_SYS_FLASH_BASE 0xe8000000
For boot from NOR flash, the system always fetches the first instruction from the end of NOR flash.
You need to build u-boot image to configure reset vector at the end of NOR flash. For example:
#ifndef CONFIG_RESET_VECTOR_ADDRESS
#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
#endif
#define CONFIG_SYS_FLASH_BASE 0xe8000000