We have a new design using a T1024 and are stuck.
The processor is connected to an FPGA on the IFC bus.
We setup the RCW source to be 0_0010 0101, which should tell it to get the RCW from the IFC bus.
Using an emulator we verified that the POR Status Register 1 showed that value, so we know we have that right.
What address will the processor go to for the RCW words over the IFC bus after it gets the RCW source? We see address 0000 on AD[0..15] and A[16..31] = 000E. The very next address is 4E on A[16..31].
Can you please explain what we are seeing here? We expected to see accesses to 00000000 for the RCW words which is where we put the data.