Hi,
We are using a QorIQ T1022 processor in our design and I am now doing SI and timing on DDR3L interface. I am using a Tektronix scope (MSO71254C) equipped with DDR Analyzer software package. I have successfully used this scope and the DDRA package on a previous design with DDR3 interface on QorIQ P1020. However, in this design, the scope does not recognize the DDR3L bursts as valid DDR3L but if I set the scope to DDR2 it recognizes them as valid read/write bursts and runs analysis.
What wrong hardware/software setting could cause this?
thanks
Ali
Do you have a figure with burst waveforms?
Regards,
Bulat
Hi Bulat,
Just uploaded the scope capture. here is how the waveforms are setup in the screen shot:
As I siad in my original statement, I had to set the scope to trigger on DDR2 events to capture this but I am running DDR3L
As I can see, DQS in the figure has wrong polarity. You need either to swap probes between DQS and /DQS signals, or to do this action via scope's options. If the conclusion of the software package about "valid DDR2 burst" is based on the current DQS waveform, its inversion can help. Please try.
Regards,
Bulat
This never crossed my mind to check. I used this scope+software for DDR3 analysis two years ago and fell in this pitfall few times and corrected it. After two years of not using this tool I totally forgot to check the polarity of the signals I connect the probes to.
I will check and update.
thanks
Ali
Hi Bulat,
Thanks, you were correct, I had the differential probe connected to DQS in opposite polarity. I corrected it and got the scope to recognize the DDR3L and mark the read/write bursts correctly. This was the first step. the next step is to run the scope DDR analysis. The write burst on one byte interface passed the test.
Now I am running into an issue where the read bursts are failing the analysis tests. The test result shows our DDR3L read bursts are failing the skew between DQ & DQS. Further looking at the other failing test results, shows that both DQ and DQS are failing slew rate. I thing the skew failure could be corrected if slew rate somehow brought within the spec. Is Freescale offering any DDR3L software utility to run some experiments on this interface?
I will try to upload the html file of our results for your reference. The Eye diagram in this results file shows the eyes of DQS and DQ superimposed in one plot. The DQS is the outer eye in orange color and the DQ is the inner eye "with density plot" with its eye totally shut. The DQS eye is not in a good shape either. Well, it seems like I can only insert image or video here. Please let me know if there is a way to upload a file.