PAMU setup in T1042

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PAMU setup in T1042

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miguel_barros
Contributor I

Hi.

I have been trying to setup the PAMU on T1042 but it doesn't seem to find the PPAACT, despite the address registers being well configured (PPBAH, PPBAL, PPLAH, PPLAL). Using Lauterbach Trace32 tool, PAMU PAACE0 is always populated by value  0x0000000FFE000000, even when I point the address register to my structure.

Maybe its the coherency sub-domain identifier (CSDId)? The T1040 Reference Manual talks very little about this field, and how the LAW (in which PPAACT is) should be "set up in a manner that includes the relevant PAMUs in the coherency sub-domain". However, the LAWn attribute register does not reference a CSDId field. Is there some more complete documentation about this?

I've read the T2080 RM and it mentions CSD_ID much more accurately, in the LAWARn attribute register and in the CoreNet Coherency Fabric section. I've also found a Freescale presentation mentioning the differences between the  QorIQ T2081 and T1040 Processor Families which seem to not affect the CoreNet Fabric or the PAMU. Does this mean that the T1040 RM is merely incomplete? Or is there an actual difference between them in respect to coherency managment?

I also noticed that some Freescale U-Boot repos mention erratum A004510 and "NOTE that if PAMU is used with this patch, it will need to use a dedicated LAW as described in the erratum. This is the responsibility of the OS that sets up PAMU.". Does this errata apply to T1042? Do I need to use a dedicated LAW in T1042?

Any help setting up PAMU in T1040/T1042 would be great.

Thanks,

Miguel

EDIT: some details

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ufedor
NXP Employee
NXP Employee

Response was provided in a Technical Case.

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