Is T4240QDS SRIO Internal Loopback Possible?

[jimccall]

Hello,

I'm trying to modify the code in Document AN4972 to create a SRIO Loopback test on a single instead of transmitting it to a secondary board. I was wondering if it was, in fact, possible to even create an internal loopback for SRIO.

I saw the SerDes ports had a register (SerDesx_LNnTCSR3) for each lane of each SerDes controller. I was wondering if this meant that SRIO also could be looped back from TX to RX by enabling this register or if an entire slew of registers needed to be changed.

Thank you!

[Pavel]

Look at NXP Community for this problem:

https://community.nxp.com/thread/355957

See also the following page:

http://www.alterawiki.com/wiki/RapidIO_Gen1_Debug_Checklist

Have a great day,
Pavel Chubakov

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