In T1024 based design, what are the scenarios when RESET_REQ_B is asserted and PORESET_B, HRESET_B is de-asserted?
I have a design, where PORESET_B and HRESET_B both are at high logic.
Only RESET_REQ_B is low.
I am not able to load RCW to NOR flash.
> I am not able to load RCW to NOR flash.
Does it mean that there is no valid RCW provided for the processor?
If "yes" - then this is the RESET_REQ_B assertion cause.
General reference - QorIQ T1024 Reference Manual, 7.3.16 Reset Request Status Register (DCFG_CCSR_RSTRQSR1).