IFC Guidence

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IFC Guidence

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faizmajeed
Contributor III

Hi!

I am using t1042 and i have to interface NVRAM which is asynchronous but in IFC GPCM we can only interface synchronous memory.

Please suggest me how can i interface NVRAM with IFC using GPCM. If it is not possible then please tell me alternative option.

Thank youCapture.PNG

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r8070z
NXP Employee
NXP Employee


Have a great day,

Because the IFC does not provides byte select signals it is better to use the NVRAM in the 8-bit configuration. So you can connect NVRAM address and data to IFC_AD[], IFC_ADDR[] and IFC_ALE of the T1040 as shown on Figure 24-65. “IFC to 8-bit NOR device interface” in the manual. Of course you should latch only IFC_AD[15:13] for the NVRAM A[16:18]. IFC_AD[0:7] are connected to the NVRAM D[7:0]. IFC WE and OE are connected to the NVRAM OE and WE. The NVRAM BHE and BLE should be pulled down (f.e. by pull down resistor). The NVRAM HSB may be connected to any free GPIO pin of the T1040. So the software can at least check busy status of the NVSRAM. I think even NOR machine can be used to control the NVRAM or GPCM in the normal internal counter-based program operation.

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r8070z
NXP Employee
NXP Employee


Have a great day,

Please let me know the NVRAM device part name. Notice that mentioned reference manual item suggests GPCM for the synchronous type of flash. But it does not mean that GPCM support only synchronous devices. You can see that clearly in the reference manual section 24.7.1.1.1 Normal GPCM internal counter-based program operation.

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faizmajeed
Contributor III

Part Number of NVRAM is

CY14V104NA-BA45XI

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r8070z
NXP Employee
NXP Employee


Have a great day,

Because the IFC does not provides byte select signals it is better to use the NVRAM in the 8-bit configuration. So you can connect NVRAM address and data to IFC_AD[], IFC_ADDR[] and IFC_ALE of the T1040 as shown on Figure 24-65. “IFC to 8-bit NOR device interface” in the manual. Of course you should latch only IFC_AD[15:13] for the NVRAM A[16:18]. IFC_AD[0:7] are connected to the NVRAM D[7:0]. IFC WE and OE are connected to the NVRAM OE and WE. The NVRAM BHE and BLE should be pulled down (f.e. by pull down resistor). The NVRAM HSB may be connected to any free GPIO pin of the T1040. So the software can at least check busy status of the NVSRAM. I think even NOR machine can be used to control the NVRAM or GPCM in the normal internal counter-based program operation.

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

1,568 Views
cyrilstrejc
Contributor III

IFC in LS1043A has byte-select signals in GPCM mode. We use a 16-bit SRAM in GPCM mode and read/write byte access (both even and odd addresses) works as expected. By quick look into T1040 docs it seems to me it has byte-select signals also, but of course, not having the hardware, I cannot verify.

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faizmajeed
Contributor III

I want to use NVRAM in 16bit mode,

is it not true to pull down the BHE' and BLE', i think by doing this i will be able to use it in 16bit mode ?

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r8070z
NXP Employee
NXP Employee

If you do not need write byte then you can use 16-bit mode and  pull-down the BHE' and BLE'. In this case when one writes 8-bit  actually 16-bit will be written i.e. one byte in the memory will be corrupted.