Hi,
I am using T1040RDB board and was trying to test the TDM interface in it.
TDM interface of T1040 is connected to cyclone FPGA and TDM coming from cyclone device is connected to Octal E1 Framer (XRT86VX38) which gives out 8 ports.
Please suggest how to configfure and test this TDM interface...
Please download and install QorIQ Linux SDK 1.9 Source and Cache ISO from https://www.nxp.com/design/software/embedded-software/linux-software-and-development-tools/linux-sdk... which includes TDM driver.
Please refer to the following procedure to test TDM interface.
1.Compile the kernel
Device Drivers --->
<*> TDM support --->
--- TDM support
<*> TDM device interface
[ ] TDM Core debugging messages (NEW)
TDM Device support --->
<*> Driver for Freescale Starlite TDM controller
<*> Zarlink Slic intialization Module
<M> TDM test Module
2.Attach two analog phones at the two FXS (FSX1 and FSX2)ports of the board before you boot the linux
setenv hwconfig fsl_ddr:bank_intlv=cs0_cs1;tdm
|
You can see follow info during the boot up:
adapter [fsl_tdm] registered SLIC: FREESCALE DEVELOPED ZARLINK SLIC DRIVER #################################################### # This driver was created solely by Freescale, # # without the assistance, support or intellectual # # property of Zarlink Semiconductor. No # # maintenance or support will be provided by # # Zarlink Semiconductor regarding this driver. # #################################################### SLIC probed! SLIC config success SLIC: product code 1 read is 4 SLIC: product code 2 read is b3 SLIC: config read is 0 SLIC: config read is 8a DEV reg is 82 DEV reg after is 2 Mask reg before setting is 3f bf Mask reg after setting is f6 f6 Read Tx Timeslot for CH1 is 0 Read Tx Timeslot for CH2 is 2 Read Rx Timeslot for CH1 is 0 Read Rx Timeslot for CH2 is 2 Operating Fun for channel 1 is 82 Cadence Timer Reg for CH1 before is 7 ff0 0 Cadence Timer Reg for CH1 after is 1 903 20 Switching control for channel 1 is 20 Operating Fun for channel 2 is a0 Cadence Timer Reg for CH2 before is 7 ff0 0 Cadence Timer Reg for CH2 after is 1 903 20 Switching control for channel 2 is 20 SLIC 1 configuration success |
insmod the tdm test module and then pick up the two phone,Anything spoken on one phone will be heard on the other.
# insmod tdm_test.ko
In addition, you could verify TDM interface working in internal loopback mode, please refer to https://community.nxp.com/t5/Layerscape-Knowledge-Base/TDM-Driver-Working-in-Internal-Loopback-mode-... for details.