How to inject CPC single-bit ECC error for T1040QDS?
is there any example available to create a single-bit ECC fault ?
Regards
Minghu
There is no example available, but you can refer to the 'L2 SYSFS parts' in the source file drivers/edac/mpc85xx_edac.c and write injection routine to operate the following registers.
13.2.14 CPC error injection low register (CPC_CPCERRINJLO)
13.2.15 CPC error injection control register (CPC_CPCERRINJCTL)
13.2.16 CPC capture data high register (CPC_CPCCAPTDATAHI)
I have successfully injected single-bit data ECC error on DDR. The error injection registers of CPC are very similar to DDR's, with some minor differences. But I have never been able to successfully inject single-bit data ECC error on CPC.
registers for ECC testing: the CPCx_CPCERRINJHI and CPCx_CPCERRINJLO define which bits you wish to corrupt,
CPCx_CPCERRINJCTL[TERRIEN]=1 enables error insertion.
The test sequence can be as following:
1) CPCx_CPCERRINJLO=00000001 (the LSbit of 64-bit word is going to be inverted);
2) CPCx_CPCERRINJCTL[TERRIEN]=1;
3) to write 0000000000000001 to some location (actually 0000000000000000 will be written due to above steps);
4) to read the location, result should be 0000000000000001 (LSbit is corrected). CPCx_CPCERRCTL register should report a single-bit ECC error.
Hi, Yiping,
Thanks for your reply, I still did not succeed in injecting the ECC error after using your steps
I have some follow-up questions, for the second step you mentioned 2)CPCx_CPCERRINJCTL[TERRIEN]=1;, shouldn't it be enabling the DERRIEN bit?
And in the third step, I would like to know if it is written to memory via load/store instructions or to cache via data cache operation instructions. Have you tried these steps on the board?
Thanks and Best Regards,
Minghu.