How to increase the NOR Flash Map size in Uboot for T2080

[flabyjacob]

Hi All,

 I am working with a T2080RDB based custom board.

The NOR Flash LAW BAR Size is set for 256MB in UBoot by default for T2080RDB EVM.

But CONFIG_SYS_MAX_FLASH_SECT is set as 1024 sectors(128MB).  When I use this setting, I am able to access 128MB of the NOR Flash on custom board.

But custom board has 256MB NOR Flash(2048 sectors). How can I access the whole 256MB from UBoot?

What all changes I have to do in Uboot for this?

Thank you..

Somebody can help me to figure it out....?

Regards

Flaby

[Pavel]

Set correct value of the CONFIG_SYS_MAX_FLASH_SECT parameter for your NOR Flash. See Datasheet for your Flash.

Have a great day,
Pavel Chubakov

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[flabyjacob]

Hello Pavel,

Thanks for your reply...

As per the note given under the table-5 in datasheet, 2Gb device has

number of blocks 0 - 2047.

Note is as follows,

Note: 1. 128Mb device = Blocks 0–127; 256Mb device = Blocks 0–255;

512Mb device = Blocks 0–

511; 1Gb device = Blocks 0–1023; 2Gb device = Blocks 0–2047.

So I set CONFIG_SYS_MAX_FLASH_SECT as 2048.

If I set this to 1024,

What should be the value for CONFIG_SYS_NOR_AMASK ?

Regards

Flaby

[karunakaranradh]

Hi Flaby,

Set the CONFIG_SYS_MAX_FLASH_SECT value to 2048 and CONFIG_SYS_NOR_AMASK as IFC_AMASK(256*1024*1024)

Ensure the Following steps:

1. Read the first and last sector of NOR flash in u-boot to make sure the TLB,IFC and LAW are configured properly.

2. As you said earlier, If flash configured for only128MB is fully write accessible. Same way configured to 256 and sector as 2048, check last sector of first die (i.e 0xE7FE0000) is write accessible or not and first sector of second die (i.e 0xE8000000) is write accessible or not.

3. if “CONFIG_SYS_FLASH_USE_BUFFER_WRITE” is enabled in your board's config file,undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE macro which is disable  buffer write . Check it is save environmental.
   

Regards,

Karunakaran R

[flabyjacob]

Hi Karunakaran,

Thanks for your support..

I have set the following parameters in the config file

CONFIG_SYS_FLASH_BASE 0xe0000000 CONFIG_SYS_MAX_FLASH_SECT 2048

CONFIG_SYS_NOR_AMASK IFC_AMASK(25610241024)As per these changes, I

have the following observations on your points, 1. Read the first and

last sector of NOR flash in u-boot to make sure the TLB,IFC and LAW are

configured properly *) Read from first and last sector works fine(Only

Read) 2. As you said earlier, If flash configured for only128MB is fully

write accessible. Same way configured to 256 and sector as 2048, check

last sector of first die (i.e 0xE7FE0000) is write accessible or not and

first sector of second die (i.e 0xE8000000) is write accessible or not.

*) When configured to 256MB, I am able to write to the last sector of

the first die (i.e 0xE7FE0000). But not to the first sector of the

second die (i.e 0xE8000000). 3. if “CONFIG_SYS_FLASH_USE_BUFFER_WRITE”

is enabled in your board's config

file,undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE macro which is disable

buffer write . Check it is save environmental. *) This macro is enabled

for me. I will disable it and let you know if I am able to save the

environmental.

Regards Flaby

[karunakaranradh]

Hi Flaby,

As per flash datasheet statement "A[26] = VIH selects the upper die; A[26] = VIL selects the lower die",
A27 of flash is differentiate the upper and lower die. I think both are independent die like two different chip.

I don't know about your u-boot version, I verified the  U-boot (2014-10) flash cfi_flash.c,
In flash_write_cfibuffer function is unlock is hard coded to zeroth sector "flash_unlock_seq(info,0);" which means only lower die is unlocked (i.e 0xE0000000).

Need to unlock the upper die during buffer write.

Change the below statement in flash_write_cfibuffer function:

From:

flash_unlock_seq(info,0);

To:

    if(sector < 1024)    
    {
        flash_unlock_seq(info,0);
    }
    else
    {
        flash_unlock_seq(info,1024);
    }

define the "CONFIG_SYS_FLASH_USE_BUFFER_WRITE" macro in board config file with above changes in cfi_flash.c file.

Kindly check it, This may resolve your problem.

Regards
Karunakaran R

[flabyjacob]

Hi Karunakaran,

Thanks for your effort in going through the UBoot Driver code and giving

us some hints...

I will check it and let you know soon...

Regards

Flaby

[vidyasagartata]

CONFIG_SYS_MAX_FLASH_SECT 1024

according to data sheet.

My problem is resolved, thanks for help.

It is proper proper cfi_probe issue for 256MB.

[vidyasagartata]

Let me know the part # of flash and send me data sheet.

[flabyjacob]

Hello Vidya,

Sorry for the delay.. I could not work onthe device for the last 3 days. We had some other issues related to DDR to get resolved parallely.

Thank you for your support.

The part number of the NOR is

PC28F00BM29EWxx

PFA - for the datasheet

Regards

Flaby

[vidyasagartata]

There are two die, check with micron team if any extra configuration needed to support two die in the u-boot as well as in the kernel.

Have you verified with Code Warrior 256MB NOR memory ?

[vidyasagartata]

Yes there is

I have seen the config file #define CONFIG_SYS_NOR_AMASK    IFC_AMASK(128*1024*1024)

Change to #define CONFIG_SYS_NOR_AMASK    IFC_AMASK(256*1024*1024)

Thanks,

Vidya

[flabyjacob]

Hi Vidya,

Thanks for your reply...

I tried modifying the macro CONFIG_SYS_NOR_AMASK to (25610241024). But

the problems are same..

Regards

Flaby

[yipingwang]

Hello Flaby Jacob,

Please modify "IFC Definitions" section in the file include/configs/T208xRDB.h.

Please define "CONFIG_SYS_FLASH_BASE" as 0xe0000000, LAW and TLB have already been configured as 256M, no need to modify, CONFIG_SYS_TEXT_BASE and CONFIG_RESET_VECTOR_ADDRESS, no need to modify.

You also need to calculate IFC timing parameters for your NOR Flash on the target board and please modify the flash related parameters followed  "NOR Flash Timing Params" section.

About how to calculate IFC timing according to the data sheet of your NOR Flash, please refer to this document I created previously IFC Controller Configuration on QorIQ Custom Boards .

Have a great day,
Yiping

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[flabyjacob]

Hello Yiping,

Thanks for your support...

As Vidya suggested earlier, I had modified CONFIG_SYS_FLASH_BASE" as 0xe0000000

The datasheet we are referring for custom board NOR Flash is the same for the T2080RDB's NOR Flash

In that case, will there be some modifications in the timing parameters?

If needed, can you help me to modify the parameters for custom NOR Flash?

I had attached the datasheet in the discussion in reply to Vidya Sagar.

Regards

Flaby

[vidyasagartata]

Dear Flaby,

I am also working for 256MB NOR flash memory for p2020RDB custom card.

NXP community suggested to use attached file change accordingly, please try to modify u-boot and let me know it is working or not?

Thanks,

Vidya

[flabyjacob]

Hi Vidya,

Thank you for your reply..

I will update you soon after applying the changes

Regards

Flaby

[vidyasagartata]

Waiting for good news.

Thanks & Regards,

Vidya Sagar Pd

[flabyjacob]

Hi Vidya,

I applied the changes what you suggested. With that I am able to read

256MByte of NOR Flash.

But following problems are found...

1) I am not able to save the environment variables in UBoot.

2) I am not able to modify the last 6 sectors of the NOR Flash at all.

These sectors are shown as RO(Read Only) when "flinfo' is issued from UBoot.

3) If NOR is set for 128MByte, I am able to access the entire 128MByte

NOR Flash and able to save the environment variables also.

Did you face any problems like this in your case?

Thank you...

Regards

Flaby

[vidyasagartata]

Dear Flaby,

Change the CONFIG_SYS_OR_PRELIM 0xF0000FF7.

Thanks & Regards,

Vidya Sagar Pd

[flabyjacob]

Hi Vidya,

Thanks for your reply...

In the board config file, I dont see the macro CONFIG_SYS_OR_PRELIM

defined!!!

Should I add #define CONFIG_SYS_PRELIM 0xF0000FF7 in my board's config

file?

Thanks & Regards

Flaby