Hi;
I try to erase and write operation with t1042 integrated flash controller, but Nor flash is 128 MB and also sector size is 128 KB, sector count 1024.
Erase/write start address is 0xe8fe0000 and sector ending address 0x8ffffff.
First of all, I run u-boot , then I read random nor flash address with a volatile unsigned integer pointer. Although I set registers ifc_cspr0_WP (chip select property register, write protect) read/write accesses is allow, i don't write or erase related nor address. I check common event and error status register (ifc_cm_evter_stat) and nor event and error status register, it seems normally, they don't indicate error.
But I don't understand this ifc norcr (nor control register) and nor flash control machine. Moreover, what is the number of phase in ifc_norcr. Why use this total number of phases ?
Related nor flash datasheet is spansion S29GL01GS. Mentioned datasheet ; address and data on which register to write. Otherwise erase state command transition issue handled with ifc on instead of me.
For example; Commend sequence; Sector Erase; Cycles 6; Addr 555; Data AA.
How to directly erase and write nor flash using ifc? Please detailed me, or show me.
Thank u.
The erase/write procedure of the NOR Flash is not a simple task and there is no such example code.
In U-boot you could refer to the "drivers/mtd/cfi_flash.c".
Thank u, but I also read related device datasheet, amd cfi commands etc. (related problem resolved with unlock cyclec command etc).
There is one basic question; is IFC bus driver necessary ? or all set related IFC registers are enough ?
I read all related nor flash register and also IFC registers thanks to u-boot.
Firstly i started with u-boot then i run related nor flash code with u-boot, but now i only want to run IFC driver code + nor flash code with my bootloader.
Sorry, as I wrote there is no simple example of the IFC NOR Flash programming.