DPAA Qman and Bman private memory set-up

[PaulWalker]

The T1040RM says the DPAA Bman and Qman need to be allocated some private memory. I'm doing this upon Core0 start-up; as the manual says this only needs to be done once. However, does the private memory require valid context on each core, i.e. a TLB entry on each core? My operating mode is AMP with a Memac MAC available on each core.

Thanks

[yipingwang · Accepted solution]

There is only one private area needed for QMan regardless of if it is AMP or SMP, the memory is used exclusively by QMan so it doesn't matter how many cores they are using. Same with BMan. This private area is used by the QMAN and BMAN, not used by CPU cores.

TLB is for entire SoC, it is not setup per core OR per AMP.

Customer may refers to the SDK2.0 User Guide for high level concept on partitioning and virtualization.
e.g.
https://docs.nxp.com/bundle/GUID-39A0A446-70E5-4ED7-A580-E7508B61A5F1/page/GUID-90B41092-EE2D-4741-B...
https://docs.nxp.com/bundle/GUID-39A0A446-70E5-4ED7-A580-E7508B61A5F1/page/GUID-9FA2A089-F316-4063-A...

[PaulWalker]

Hi,

Thanks for the info. That's great.

You said "TLB is for entire SoC, it is not setup per core OR per AMP."

This is not my understanding. My understanding is that LAW, IFC, etc. are part of the SoC so have global context and are set-up once. TLB is a feature of the E500-series core L2MMU, so has core context. As such, TLB is set-up per-core so that each core can have a different context.

[yipingwang]

Sorry about the confusion. I do mean LAW, not TLB. My apology for typo.