DDR4 initialization issue in T1022

[debduttabanerje]

In follow up to this post:

https://community.nxp.com/t5/CodeWarrior-for-QorIQ/DDR-single-bit-fault-detected-by-ecc/m-p/1893988/...

As per advice from nxp team, setup a bareboard project with "attach" launch configuration. The ddr controller register was copied (attached).

But the dump format doesn't match with with register export format from qcvs.

Anyway after comparison and modification imported back the registers. and again started validation.

However the result is same.

Now u-boot is stuck where u-boot is copied from spi flash to ddr. (attached)

[yipingwang]

Please refer to the following update from the AE team.

if you run it at 1000MT/s, you could for debug purposes disable the SW check on the frequency that is putting out that message.

[debduttabanerje]

From the source code (./drivers/ddr/fsl/lc_common_dimm_params.c line 46),

#ifdef CONFIG_SYS_FSL_DDR4
        if (mclk_ps > outpdimm->tckmax_ps) {
                printf("DDR clock (MCLK cycle %u ps) is slower than DIMM(s) (tCKmax %u ps) can support.\n",
                       mclk_ps, outpdimm->tckmax_ps);
        }
#endif

and 

        if (caslat_actual * mclk_ps > taamax) {
                printf("The choosen cas latency %d is too large\n",
                        caslat_actual);
        }
        outpdimm->lowest_common_spd_caslat = caslat_actual;
        debug("lowest_common_spd_caslat is 0x%x\n", caslat_actual);

these checks are only informative and ddr initialization still goes ahead.

It fails while copying main uboot as seen in the attached u-boot log (u-boot_log.txt).

This u-boot log is with MEM_PLL_RAT set to 10:1 in RCW and DQ mapping bypassed as per previous reply.

Please suggest how to debug this further.

[yipingwang]

Investigating

[yipingwang]

Thanks for your information, will be back to you later.

[yipingwang]

Discussing this problem with the AE team.

[debduttabanerje]

Dear NXP team, please assist.

[yipingwang]

I didn't get feedback from the AE team, will contact them again.

[yipingwang]

in QCVS after the SPD configuration is complete, then go to "operational DDR test" and run write-read-compare test. if it fails, then get the full ddr register dump via ccs and send it.

How to get register dump via ccs
This is for debug use only.
1) Open a CCS window (C:\Freescale\CW4NET_xxxxx\Common\CCS\bin\ccs.exe)
2) Physical connection: USB to PC, JTAG to the customer board.
3) SW connection: in the ccs window type:

delete all
config cc cwtap
ccs::config_chain t1040
display ccs::read_mem 0 0x30000 0x8000 4 2 1024
ccs::write_mem 0 0x30000 0x8FB0 4 2 0x10000000
display ccs::read_mem 0 0x30000 0x8000 4 2 1024

[debduttabanerje]

operational test 'write-read-compare failed (see write-read-compare.png)

Please find attached reg dump (ccs_ddr_dump.txt)

Can you explain why the start address of ddr test is fixed at 0x100000000, and any other address is not allowed. (see write-read-compare-start_address.png and write-read-compare-start_address_err.png)

I think DDR mem is mapped in the lower 2GB space(from 0x0) in u-boot.

Thanks

Debdutta

[yipingwang]

Please bring the board (that you want to test on the QCVS DDR tool) to uboot prompt. when board working and at uboot prompt, get a CCS register dump as described previously and send the dump log.

How to get register dump via ccs
This is for debug use only.
1) Open a CCS window (C:\Freescale\CW_PA_v10.5.1\PA\ccs\bin\ccs.exe)
2) Physical connection: USB to PC, JTAG to the customer board.
3) SW connection: in the ccs window type:

delete all
config cc cwtap
ccs::config_chain t1040
display ccs::read_mem 0 0x30000 0x8000 4 2 1024
ccs::write_mem 0 0x30000 0x8FB0 4 2 0x10000000
display ccs::read_mem 0 0x30000 0x8000 4 2 1024

[debduttabanerje]

Hi, the board is not not booting up to u-boot prompt at all. It gets stuck as shown below:

Initializing....using SPD
WARNING: Calling __hwconfig without a buffer and before environment is ready
WARNING: Calling __hwconfig without a buffer and before environment is ready
WARNING: Calling __hwconfig without a buffer and before environment is ready
WARNING: Calling __hwconfig without a buffer and before environment is ready
6 GiB left unmapped
Loading second stage boot loader .................................................................................................