DDR3 Initialization on T1042

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DDR3 Initialization on T1042

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embeddedengine1
Contributor III

We are going to replace DDR4 from reference board to DDR3 in our custom board. I wanted to confirm if there are other changes required to enable DDR3 initialization on u-boot other that removing CONFIG_SYS_FSL_DDR4 from u-boot config? Or just removing that config option will enable initialization of DDR3 in u-boot?

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Pavel
NXP TechSupport
NXP TechSupport

The T104xRDB.h configuration file from u-boot SDK 2.0 contains the following:

#define CONFIG_DDR_SPD

#ifndef CONFIG_SYS_FSL_DDR4

#define CONFIG_SYS_FSL_DDR3

#endif

 

It means that removing CONFIG_SYS_FSL_DDR4 enables DDR3 using.


Have a great day,
Pavel Chubakov

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embeddedengine1
Contributor III

We have added DDR3 discrete chips to our board so there is no option for SPD, so I also need to comment #define CONFIG_DDR_SPD from T104xRDB.h file. As there's no SPD, so I have generated the timing parameters following this guide.

Now as mentioned in the point 3 page 5 of this guide, I have pasted the C code generated in QCVS DDR tool to ddr.c file. Now I want to confirm that is there any other modification required to ddr.c file? Because I cant see the structure generated by QCVS used anywhere in u-boot code. How will the pasted parameters be used by u-boot now?

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Pavel
NXP TechSupport
NXP TechSupport

The T104xRDB.h configuration file from u-boot SDK 2.0 contains the following:

#define CONFIG_DDR_SPD

#ifndef CONFIG_SYS_FSL_DDR4

#define CONFIG_SYS_FSL_DDR3

#endif

 

It means that removing CONFIG_SYS_FSL_DDR4 enables DDR3 using.


Have a great day,
Pavel Chubakov

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

View solution in original post