CFG_BANK and IFC_RB SIGNAL

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CFG_BANK and IFC_RB SIGNAL

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gokulkrishnan
Contributor III

Hello,

I am looking at the T1040 reference schematics. I an see a set of signals called CFG_BANK coming from the CPLD to the FLASH. Can you please elaborate the functionality, i am unable to understand what it does.

Another set of signals IFC_RB0 and IFC_RB1 are given to the CPLD, can you elaborate the functionality.

Regards 

Gokul

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gokulkrishnan
Contributor III

Hi ufedor,

In my design I am connecting the CS0 to the NOR flash directly and CS1 to the NAND flash directly. So in this case is there any issue if we don't connect RB0 and RB1

Regards 

Gokul

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ufedor
NXP Employee
NXP Employee

It is reasonable to read the T1040 RM, 24.9.4 IFC flash connections.

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ufedor
NXP Employee
NXP Employee

> set of signals called CFG_BANK

CFG_VBANK signals are used to create virual banks in the NOR Flash.

Three signals could be used to organize up to 8 banks.

Usually only CFG_VBANK0 is used to create configuration with current and alternate banks - refer to the SDK Documemtation NOR Flash memory map.

> IFC_RB0 and IFC_RB1 are given to the CPLD

Function of the IFC_RB0(1)_N depends on selected booting device - NOR or NAND.

NOR booting:

IFC_RB0_N - NOR_RB_N

IFC_RB1_N - NAND_RB_N

NAND booting:

IFC_RB0_N - NAND_RB_N

IFC_RB1_N - NOR_RB_N

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