Hi Sriram,
Unfortunately, I am not familiar with this Infineon’s MCU, but you are correct that both single byte read and write SPI transactions are completed in 24 clock pulses.
So, you need to make sure there is no CS transition between the first 16 bits and the following 8 data bits. Your chip select output will have to be driven manually as a GPO.
Also, if your SPI module only allows to send x * 16 bits of data, you will have to likely implement software SPI using GPIOs to make sure you send out 24 and not 32 bits.
As for the example code, I will send it to you through your case #00306939.
Best regards,
Tomas