MMA8652 continous shake and tap FIFO not working

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MMA8652 continous shake and tap FIFO not working

975 次查看
saitejanalamala
Contributor II

Hello,

 

I am using mma8652, I have enabled tap and FIFO on a single interrupt pin. Now if I shake or Tap continuously on device FIFO is not storing any data, and in reading, I receive zero to all 32 samples.

 

I am using FIFO as when overflowed stop taking data until clear.

 

Please suggest some thing.

 

Below are my settings
 

  I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_CTRL_REG1_ADDR, 0xA2);            

    I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_CTRL_REG2_ADDR, 0x00);            

    I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_CTRL_REG3_ADDR, 0x01);            

    I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_CTRL_REG4_ADDR, 0x48);            

    I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_CTRL_REG5_ADDR, 0x48);         

    I2CWriteReg(MMA8652_WRITE_ADDR, F_SETUP, 0xA0);

    I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_XYZ_DATA_CFG_REG_ADDR, 0x00);     

I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_PULSE_CFG_REG_ADDR, 0x7F);   

I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_PULSE_THSX_REG_ADDR, 0x32);   

I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_PULSE_THSY_REG_ADDR, 0x32);   

I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_PULSE_THSZ_REG_ADDR, 0x32);   

I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_PULSE_TMLT_REG_ADDR, 0x0A);   

I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_PULSE_LTCY_REG_ADDR, 0x08);   

I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_PULSE_WIND_REG_ADDR, 0x50);  

    I2CWriteReg(MMA8652_WRITE_ADDR, MMA8652_CTRL_REG1_ADDR, 0xA3);

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821 次查看
david_diaz
NXP Employee
NXP Employee

Hello,

Are you pretending to read the data from the FIFO buffer once a TAP event is triggered?

In that case, please review the chapter 5.2 from the document below in order to find an example code using the FIFO.

Using the 32 Sample First In First Out (FIFO) in the MMA8451Q

Please let me know if you have any question.

Regards,

David

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