MMA8451/2/3 motion detection interrupt timing diagram / spec required.

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MMA8451/2/3 motion detection interrupt timing diagram / spec required.

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priyankpatil
Contributor I

I want to use MMA8451/2/3 to start / wake up a wireless module. It requires certain pin on the module to be pulled low for 1 second or more. From the datasheet I know that MMA8451/2/3 has active high interrupts but I could not find the duration for which the interrupt pin remains high. Is this duration defined in the datasheet? Is it user configurable?

Also, it would help reduce a few components if the interrupt pins can be can be configured to be active low. i.e. pin is normally high but goes low when motion is detected.

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TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Priyank,

The interrupt pins can be configured to be push-pull or open drain and can be either active high or active low. This is done in the CTRL_REG3 (0x2C). Bit 0 (PP_OD) sets the configuration of the interrupt pins to be open drain or push-pull and bit 1 (IPOL) sets the polarity, either active high or active low.

The interrupt is generated every time the event condition is detected and is cleared by reading the appropriate status register (ELE bit = 1) or automatically (ELE bit = 0). For the Freefall/Motion interrupt, the appropriate status register is the FF_MT_SRC register.

I hope it helps.

Regards,

Tomas

PS: If my answer helps to solve your question, please mark it as "Correct". Thank you.

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945件の閲覧回数
TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Priyank,

The interrupt pins can be configured to be push-pull or open drain and can be either active high or active low. This is done in the CTRL_REG3 (0x2C). Bit 0 (PP_OD) sets the configuration of the interrupt pins to be open drain or push-pull and bit 1 (IPOL) sets the polarity, either active high or active low.

The interrupt is generated every time the event condition is detected and is cleared by reading the appropriate status register (ELE bit = 1) or automatically (ELE bit = 0). For the Freefall/Motion interrupt, the appropriate status register is the FF_MT_SRC register.

I hope it helps.

Regards,

Tomas

PS: If my answer helps to solve your question, please mark it as "Correct". Thank you.

944件の閲覧回数
priyankpatil
Contributor I

Thank you very much. It worked as expected.

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