FXLS8964AF issue setting registers

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FXLS8964AF issue setting registers

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Nesdoly
Contributor I

I'm having trouble setting some of the control/config registers in an FXLS8964AF, but strangely not all of them. I'm using a standard 4 wire SPI interface (mode 0) running at 4MHz.

The one I cannot set, but absolutely require, is SENS_CONFIG5 (0x19). I'm trying to set the VECM_EN bit. I write 0x10 to this register, but I keep reading back 0x00 - and the contents of the VECM registers are always 0, so the vector magnitude functionality is indeed off.

There are others I cannot set: INT_EN (0x20). I'm attempting to write 0xa0, but it always reads back as 0x00.

SDCD_CONFIG1 & 2 are also giving me problems. I'm writing 0xb8 0xf2 but both read back as 0x00.

I've tried writing the registers in groups (taking advantage of the auto-increment feature) and individually - no difference in behavior with either.

Is there a timing trick to setting these registers that I'm not aware of?

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MrMartin
Contributor I

I have exactly the same problem ....

I like to set bit VECM_EN in register SENS_CONFIG5 (0x19), but it's refused. Reading back the register shows always the flag being zero.
I cannot believe, that it is a basic I2C problem, because all other communication works robust.

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Nesdoly
Contributor I

Sorry I never bothered to update this post. I did hear back from NXP support shortly after I originally posted this.

"I tested your settings on my FRDM-STBA-A8964 EVB. When I follow your settings, the board is reset. In the step 3. SENS_CONFIG5=0x10, I cannot enable the Vector magnitude function. The VCEM_EN does not stay set to 1. Please try the settings from FreeMASTER GUI, where I run the example attached. The Vector magnitude function works here."

I've attached support's screenshot. Long story short, there are combinations of settings for this accelerometer that are mutually exclusive. The data sheet doesn't say what settings are or are not compatible.

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diazmarin09
NXP TechSupport
NXP TechSupport

Hello Nesdoly,

I hope all is great with you. Thank you for using the NXP communities.

The device supports SPI interface with clock frequencies up to 4MHz. Could you please review the table below? Are you within the SPI timing specification?

diazmarin09_0-1691777233541.png

How many devices have you tested and failed?

Can you share your device configuration (schematic)? Is the INTF_SEL pin pulled to VDD?

Could you please share the procedure that you use to configure the device using SPI?

 

In the meantime, I would like to recommend the document below. You may use the examples as a reference for your design.

AN12004

Regards,

David

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