ENDINIT/RESET on FXPS7115D4

[tcachat]

According to the datasheet,the only way to clear the ENDINIT bit (bit 7 of DEVLOCK_WR register) is to write the RESET bits (bits 0 and 1 of DEVLOCK_WR) according to Table 46. Well, the other way is to power cycle. But what do you mean by "Device RESET". I thought that every register would be reset to it's initial value, but it seems that it is not the case. Is it just a "Device unlock"?

Using SPI, after such a "reset", and also after power cycling the part, I have to send a few SPI frames before I get a correct answer (the first answers start with 0x0C). Strangely I do not think I just have to wait.

Thank you

[TomasVaverka]

Hello Thierry,

1. Note, the ENDINIT bit is not required to be set. This is a safety feature that will not allow inadvertent writes to the LPF or self-tests. Device reset can either be by power cycle or soft reset. All registers should reset.

2. This is normal if I understand your question correctly. This typically happens as the devices internal DSP/filters are initializing and depends on self-tests running.

Best regards,

Tomas