Hi There, in safety manual par "6.13.3.1 FlexCAN module safety measures" there is the following statement "The CRC module can be used to protect payload data for a CAN trasmission" I suppose that is not mandatory, isn't it ? isn't the FlexCan CRC trasmission calculation (with rolling counter,...)enough for safety ? and the use of CRC Hw module can be avoided ? Best Regards, Fabio     ...その他を表示

Hello Support team, Continued from below. https://community.nxp.com/t5/SafeAssure-Community/Concerns-about-HDQFP100-pin-failure-in-S32K312/m-p/1851017/emcs_t/S2h8ZW1haWx8dG9waWNfc3Vic2NyaXB0aW9ufExWOUJLVkNWVTBTN0JGfDE4NTEwMTd8U1VCU0NSSVBUSU9OU3xoSw#M1344 I have some additional questions. [Question] 1. Is it possible to detect LVD/HVD of V11/V25? It seems that HVD11/HVD25 can be detected by the following two registers, but it cannot be detected by LPM. Also, I can't find the LVD for V11/V25. ===================================== S32K3xx Reference Manual, Rev. 8 43.7.2 Low Voltage Status And Control (LVSC) 11:HVD11S 10:HVD25S ===================================== 2. >- V25 (11pin) was shorted to 10pin (VDD_HV_A): If V25 pins are shorted to VDD_HV_A then this condition should be detected by the HVDs on V25. What will happen if I leave it alone after being detected by V25's HVD? Does S32K3 have HVR? There was an LVR in the document below, but there was no HVR. ===================================== S32K3xx Reference Manual, Rev. 8 43.7.2 Low Voltage Status And Control (LVSC) 23:LVR11LPF 21:LVR25LPF ===================================== 3. >- VREFH shorted to VREFL: This should be covered via SM1.ADC_SELFTEST. I understand that it can be detected using SM1.ADC_SELFTEST. But I can't find SM1.ADC_SELFTEST. The S32K3 self-test states that there are the following algorithms and steps, but there is no description of SM1. ===================================== S32K3xx Reference Manual, Rev. 8 60.3.17.2 Self-test Table 335. Self-test steps ===================================== SM1.ADC_SELFTESTについて、ドキュメントのどこに記載があるか教えてほしい I would like to know where SM1.ADC_SELFTEST is described in the document. Also, what happens if "VREFH shorted to VREFL" is left as is? I think this is due to a decrease in ADC performance, is that correct? 4. >V11(60pin) was shorted to 59pin(PTE7) which outputs low.: >If V11 gets shorted to low voltage, then it would cause a under-voltage event which would be detected by on-chip low voltage detector (LVD) and off-chip watchdog monitors (V11 which is the core supply) What will happen if I leave it as it is detected? Best regards, Hiroyuki Kadowaki ...その他を表示

In eMcem_init, the function status return is E_NOT_OK.Through the useing step debug find eMcem_Fccu_ReadFaultStatus return FCCU_FAULT_ASSERTED, so eMcem_init return is E_NOT OK.But if starting the eMcem_init start to step debug run function, eMcem_init return is E_OK. Please anyone know how to resolve this issue, Thanks. ...その他を表示

SCST m7_scst_spfpu_convert_test1 fails every now and then but it passes most of the times. I have debugged the assembly code and I see that some times the S0 and S1 are not getting the correct values when arriving to the m7_scst_spfpu_convert_test1_check_fpdscr section. Also, test m7_scst_fetch_test fails but with less frequency. This I can only avoid it by disabling all the OS interrupts before executing the SCST tests but I can't do that always, the user manual says I can leave the Interrupts enabled and that the library should take care the interrupts but this issue happens every 100-300 test executions. How can I fix this issue without disabling all the interrupts before executing all 50 tests? ...その他を表示

I have reviewed the FMEDA excel data for the S32K312 MCU, and there are a few things to check, so I would like to request it. 1) The data I have is only applied in accordance with IEC-TR-62380 regarding Permanent Failure Rate. I would like to request that NXP provide me with the Failure Rate calculated using SN29500. 2) Among the failure rates predicted by IEC-TR-62380, the percentage of permanent die and package seems strange, so I would like to know the calculation conditions for permanent failure. (i.e. No of TR. 7.894E7, MOS, BiCMOS (low voltage) digital circuits, power 0.6W & Thermal resistance 35.3degC/W, package pin pitch 0.325, package width 10) Of the Permanent Total 130.4158 FIT, 0.4158 FIT was assigned to Die in FMEDA excel, and 130 FIT was assigned to Package. There is a difference from the actual calculation result according to IEC-TR-62380, so it is necessary to check whether the die calculation was calculated as Ton + Toff = 1 rather than Ton = 1. ...その他を表示