SMA2/SIR_41 with VR5510 and s32g2?

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SMA2/SIR_41 with VR5510 and s32g2?

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RandyKrakora
NXP Employee
NXP Employee

Customer is Aurora.

 

They need guidance with an issue we are encountering when implementing safety mechanism SMA2/SIR_41 in the VR5510 Safety Manual. The safety mechanism is to ensure that the RSTB path between VR5510 and S32G is intact. Initially, they implemented it as follows:

 
 

image_2024-07-30_120059141.png

 

The problem is RSTB_EVENT was always 0 after S32G came out of a RSTB reset. According to the safety manual, this bit cleared only on a POR on PMIC. Apparently, the PMIC is configured to  assert PGOOD when RSTB is asserted (VR5510 SM, 5.2.11.1). So when the PMIC asserted RSTB upon the RSTB request from MCU, it also asserted PGOOD (both RSTB_EVENT and PGOOD_EVENT in FS_SAFE_IOS were set), which power-on reset the MCU, which also power-on reset the PMIC, which cleared RSTB_EVENT. This means that RSTB_EVENT can’t be used as the persistent part of their RSTB-check state machine. They could replace RSTB_EVENT with flash, but at the cost of wearing out the flash. Do we have any suggestions for this?

 

-Randy Krakora

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BasW
NXP Employee
NXP Employee

Hi Randy,

you can manual trigger an RSTB assertion over the I2C interface of the PMIC

BasW_1-1723721288243.png

On the MCU side you map the RESET_B input to an Interrupt in stead of a reset.

BasW_0-1723721269105.png

After triggering an RSTB assertion, you check if the interrupt routine is called.

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