Example Description
This application demonstrates the usage FlexTimer Module in Global time base mode. The application includes S32 Design Studio projects for both devices, that uses configurations for for the IP layer only (Clocks, Port_Ip_1, IntCtrl_Ip and Ftm_Gpt).
For more details please refer to FlexTimer Module (FTM) Usage on S32M24x and S32K14x Series.
Installation steps
Software installation
S32 Design Studio for S32 Platform v.3.5
RTD for S32K1 and S32M24x version 2.0.0 including patch P01
Hardware installation
Supported boards:
- S32M24xEVB-C064
- S32K144EVK
Connections to the scope in S32M24xEVB-C064/S32K144EVK:
- PTD0 (J60-2/J2-6)
Debugger in S32M24xEVB-C064/S32K144EVK
- Use the On-board Debug Interface in J32/J7 Open SDA connector.
S32 Configurations Tool
Clocks Tool
S32M244 and S32K144 features a complex clocking sourcing, distribution. To run a core of the S32M244/S32K144 as well as some MCU peripherals at maximum frequency 80 MHz in normal RUN mode, S32M244 is supplied externally by 16 MHz crystal (meanwhile S32K144 is supplied externally by 8 MHz crystal). This clock source supplies Phase-lock-loop (PLL), which circuit multiplies frequency by 20 in S32M244 (and by 40 in S32K144) and divides by 2 resulting 160 MHz frequency on output for both devices. PLL output is then divided by 2 to supply core and system (80 MHz), further divided by 2 and 4 to supply bus clock (40 MHz) and flash clock (20 MHz), respectively (See next Figure).
Figure 1. S32M244 Clocks Configuration
Pins Tool
In Pins Tool are selected the signals to use the PORTD as follows:
Figure 2. S32M244 Pins Configuration
Peripherals Tool
Below is the FTM GPT configuration (the default configuration of the tabs that are not shown is used):
Figure 3: FTM_GPT GptChannelConfigSet
Figure 4: FTM_GPT GptHwConfiguration
Figure 5: IntCtrl_Ip Interrupt Controller
Software implementation
The application software functionality perform the following instructions (see Example 1):
- Define FTM notification
- Initialize Clock driver.
- Initialize Port driver
- Initialize ISR
- Initialize GPT driver
- Initialize GPT channel
- Enable channel interrupt
- Start timer
- Toggle GPIO in a while loop
Example 1. S32M244 FTM GPT configured by S32 SDK
...
void FtmNotification(void)
{
++index;
if (index >= 1000U)
{
toggleLed = TRUE;
index = 0;
}
}
...
int main(void)
{
/* Initial Clock */
Clock_Ip_Init(clockConfig);
/* Initial Pin */
Port_Ci_Port_Ip_Init(NUM_OF_CONFIGURED_PINS_BOARD_InitPins, g_pin_mux_InitConfigArr_BOARD_InitPins);
/* Initial ISR */
IntCtrl_Ip_Init(&IntCtrlConfig_0);
/* Initial FTM instance 0 - Channel 1 */
Ftm_Gpt_Ip_Init(FTM_INSTACE_0, &FTM_0_InitConfig_PB);
/* Initial channel 1 */
Ftm_Gpt_Ip_InitChannel(FTM_INSTACE_0, FTM_0_CH_1);
/* Enable channel interrupt FTM0 - CH_1 */
Ftm_Gpt_Ip_EnableChannelInterrupt(FTM_INSTACE_0, CH_1);
/* Start channel CH_1 */
Ftm_Gpt_Ip_StartTimer(FTM_INSTACE_0, COUNTER_VALUE);
/* Waiting for Interrupt occurred */
while (TRUE)
{
/* Toggle the GPIO when the FTM notification is called */
if (TRUE == toggleLed)
{
Gpio_Dio_Ip_TogglePins(LED_PORT, (1 << LED_PIN));
toggleLed = 0U;
}
}
return 0;
}
...
On the oscilloscope
Figure 6 shows PTD0 (D2) signal of S32M244 in the oscilloscope. Such GPIO is toggled when the FTM notification is called..
Figure 6: Global time base in S32M24x
