unaligned memory access fault on S32K312 with MCAL RTD 3.0.0

[Hudson001]

Hello,

I have a unaligned memory access fault on S32K312 with MCAL RTD 3.0.0.

The issue description :

With Autoever Autosar V2.0.0 SWP release, OS reset happened which is caused by unaligned memory access fault.
The fault always happened when a global variable is defined in system RAM area of 0x2040C000~0x20418000.
In system RAM area of 0x20404000~20407fff, there is no this fault.
In DTCM area, there is no this fault.
I have checked the UNALIGN_TRP bit of Arm Cortex-m7 CCR register, it's disabled in init, and checked when fault happening, it is zero, Trapping disabled.

I tested two ways of the unaligned memory access which would trigger the fault.

. Way-1, structure elements access in unaligned memory

typedef struct {
uint8 a;
uint32 b;
}unaligned_test_t;

attribute((section(".SYSRAM_2040B000"))) unaligned_test_t unaligned_test_data_sram_2040B000;
attribute((section(".SYSRAM_2040C000"))) unaligned_test_t unaligned_test_data_sram_2040C000;

void unaligned_test(void)

{
unaligned_test_data_sram_2040B000.b = 0x10; // no unaligned access error.
unaligned_test_data_sram_2040C000.b = 0x10; // unaligned access error happened.
}

. Way-2, array access in unaligned memory

attribute((section(".SYSRAM_2040B000"))) uint8 unaligned_test_array_sram_2040B000;
attribute((section(".SYSRAM_2040C000"))) uint8 unaligned_test_array_sram_2040C000;

void unaligned_test(void){

uint32 * ptr;

for (uint32 i=0; i<16; i++)

{
     ptr = (uint32 *)&unaligned_test_array_sram_2040B000[i];
     *ptr = i;               // no unaligned access error happened.
}

for (uint32 i=0; i<16; i++)

{
     ptr = (uint32 *)&unaligned_test_array_sram_2040C000[i];
     *ptr = i;               // no unaligned access error happened on offset 0,4,8,12
                             // unaligned access error happened on offset 1,2,3,5,6,7,9,10,11,13,14,15.
}

}

[Hudson001]

The issue disappeared after MPU init code masked, that means MPU disabled. So why the MPU would trigger the unaligned access issue? The MPU config is in below,

  Region  Description                   Start       End           Size[KB]  permission                attribute                 execute              srd     enable
--------  ----------------------------  ----------  ----------  ----------  ------------------------  ------------------------  -------------------  ------  ----------
       0  BACKGROUND_REGION             0x0         0xFFFFFFFF     4194304  MPU_ACCESS_P_PRIV_RW      MPU_ATTR_STR_ORD_DEV      MPU_INST_ACCESS_DIS  0x00    MPU_ENABLE
       1  CM7_SELF_ITCM_REGION          0x0         0x00007FFF          32  MPU_ACCESS_P_PRIV_RW      MPU_ATTR_NORM_MEM_WT      MPU_INST_ACCESS_EN   0x00    MPU_ENABLE
       2  PROGRAM_FLASH_REGION_ADDR     0x00400000  0x005FFFFF        2048  MPU_ACCESS_P_PRIV_RO      MPU_ATTR_NORM_MEM_WT      MPU_INST_ACCESS_EN   0x00    MPU_ENABLE
       3  DATA_FLASH_REGION_ADDR        0x10000000  0x1001FFFF         128  MPU_ACCESS_P_PRIV_RW      MPU_ATTR_NORM_MEM_WT      MPU_INST_ACCESS_DIS  0x00    MPU_ENABLE
       4  CM7_SELF_DTCM_REGION_ADDR     0x20000000  0x2000FFFF          64  MPU_ACCESS_P_PRIV_RW      MPU_ATTR_NORM_MEM_WT      MPU_INST_ACCESS_DIS  0x00    MPU_ENABLE
       5  SRAM_REGION_ADDR              0x20400000  0x20417FFF          96  MPU_ACCESS_P_PRIV_RW      MPU_ATTR_NORM_MEM_WT      MPU_INST_ACCESS_EN   0x00    MPU_ENABLE
       6  PERI_REGISTER_REGION_ADDR     0x40008000  0x40807FFF        8192  MPU_ACCESS_P_PRIV_RW      MPU_ATTR_SHR_DEV          MPU_INST_ACCESS_DIS  0x00    MPU_ENABLE
*/
static const uint32 EcuM_Rbar[CPU_MPU_MEMORY_COUNT] = {0x00000000UL, 0x00000000UL, 0x00400000UL, 0x10000000UL, 0x20000000UL, 0x20400000UL, 0x40008000UL};
static const uint32 EcuM_Rasr[CPU_MPU_MEMORY_COUNT] = {0x1100003FUL, 0x0102001DUL, 0x05020029UL, 0x11020021UL, 0x1102001FUL, 0x0102F821UL, 0x1101002DUL};

[danielmartynek]

Hi @Hudson001,

In ARM®v7-M Architecture Reference Manual

Section A3.5.7 Memory access restrictions

You can read:

"An instruction that generates an unaligned memory access to Device or Strongly-ordered memory is
UNPREDICTABLE."

Here are the definitions of the memory types:

https://developer.arm.com/documentation/dui0646/c/Cortex-M7-Peripherals/Optional-Memory-Protection-U...

Regards,

Daniel

[Hudson001]

Thank you Daniel,

But still not clear why the unaligned error happened on system ram address >=0x2040c000, the MPU setting seems applied on whole sysRam 0x20400000 with MPU Rasr register value 0x0102F821

[danielmartynek · Accepted solution]

I see, it is a normal type memory.

I have just reproduced the error using your RASR value.

In my test project, there are only 2 regions, this one and one that covers the whole map (Strongly ordered)

Why do you enable the subregions there?

It works when the subregions are disabled, refer to ARM documentation.

Can you try this configuration?

Regards,

Daniel

[Hudson001]

Hi Daniel, I got understand the RASR register usage.

The MPU region size (RASR.Size) is defined as 2^(16+1) = 128KB, so each subregion is 128K/8 = 16K. On S32K312, SRAM is 96KB, so SRD bit of RASR should be 0xC0, subregion 7,6 disabled, subregion 5-0 enabled. 

I tested RASR with value of 0x01020021 and 0x0102C021, both worked, unaligned error did not happen on whole SRAM region of 0x20400000~0x20417FFF.

Thanks for your great support^^

regards,

Hudson