good morning, i'm developing a project on the micro s32k324 dual core nxp. I need to set two independent timers on core0 each having its own interrupt with the relative associated priority. At this moment the PIT timers are already all used on core1 and therefore i can't use them on core0.
my intention was to use the two STM timers on core0 but i saw that in theory STM0 is dedicated for core0 and STM1 is dedicated for core1.
the question is: despite this indication can i use both STM on core0?
in this way for each STM i can select an interrupt with the relative priority and it would allow me to achieve the goal.
thanks in advance for any information/help.
best regards
