s32k312 pwm output

[fengba_360]

Hello, we encountered a strange phenomenon while using the PWM output function with the s32k312. When configuring the clock divider value at the EMIOS_MCL layer for global frequency division, we found it did not work, but configuring the channel frequency divider was effective. For example, when the system clock frequency is 120MHz, if we set the global frequency division to 120 and the channel frequency division to 10, with a period tick of 50,000, the output frequency is 240Hz. However, if we set the global frequency division to 1 and the channel frequency division to 10, with the same period tick of 50,000, the output frequency remains 240Hz.

[Senlent]

Hi@fengba_360

"However, if we set the global frequency division to 1 and the channel frequency division to 10, with the same period tick of 50,000, the output frequency remains 240Hz"

I think this is wrong. It should still change. You can test it again.

[fengba_360]

Moreover, didn't you say that if the internal counter is selected for PWM output, it is unrelated to the MCL global prescaler?

[fengba_360]

I have tested it, and for PWM output, the global prescaler does not take effect, but it does take effect when measuring with PWM ICU.

[Senlent]

Hi@fengba_360

This is impossible. I tested it and found that the global prescaler is effective for all channels.

[fengba_360]

My understanding is the same as yours, but the actual test result shows that the global division has not taken effect.

[fengba_360]

Hello, I have conducted another round of actual measurements, and here are my results. I set the global frequency division to 10 and the channel frequency division to 12. Based on theoretical calculations, the final frequency of this channel should be 1MHZ, with a tick of 50,000, resulting in an output frequency of 20HZ. However, when I measured it with an oscilloscope, the actual output frequency was 200HZ.

[Senlent]

Hi@fengba_360

Did you initialize MCL in the main function?

[fengba_360]

It didn't work.

[Senlent]

Hi@fengba_360

Please provide your project and I will check it for you.

My test project is in line with expectations.

[fengba_360]

Should I create a new case or directly send it to your email?

[Senlent]

Hi@fengba_360

you can create a new case and tell me the case number.

[fengba_360]

case：00674118

[fengba_360]

hello ：Please have a look.

[Senlent · Accepted solution]

Hi@fengba_360

In your project, you didn't enable UCPREN bit.

eMIOS_Cn.UCPREN = 0:

eMIOS_Cn.UCPREN = 1:

[fengba_360]

thanks，it is work

[Senlent]

Hi@fengba_360

Emios_Mcl_Ip_Init(0U, &Emios_Mcl_Ip_0_Config);

Emios_Mcl_Ip_ConfigureGlobalTimebase(0U, TRUE);

[Senlent]

Hi@fengba_360

You select "Internal Counter" for Ch5, so there is nothing do to with "Mcl" settings.

[fengba_360]

Received, thank you. However, when I use the EMIOS ICU to measure PWM input and select the EMIOS_ICU_BUS_INTERNAL_COUNTER, the global frequency divider does indeed take effect. As shown in the figure below, I am somewhat confused. Could you please help clarify this?