@Senlent
i tested the AN code, have some questions about it
void Phase_Shifted_PWM()
{
SCG_Init();
HSRUN_Init();
/* Enable clock for FTM1 */
PCC->PCCn[PCC_FTM1_INDEX] = PCC_PCCn_PCS(6) | PCC_PCCn_CGC_MASK;
/* Enable clock for PORTB */
PCC->PCCn[PCC_PORTB_INDEX] = PCC_PCCn_CGC_MASK;
/* Enable clock for PORTD */
PCC->PCCn[PCC_PORTD_INDEX] = PCC_PCCn_CGC_MASK;
PORTB->PCR[2] = PORT_PCR_MUX(2); // Set PTB2 for FTM1 � Channel0
PORTB->PCR[3] = PORT_PCR_MUX(2); // Set PTB3 for FTM1 � Channel1
PORTD->PCR[8] = PORT_PCR_MUX(6); // Set PTD8 for FTM1 � Channel4
PORTD->PCR[9] = PORT_PCR_MUX(6); // Set PTd9 for FTM1 � Channel5
/* Enable combine, complementary mode and dead-time for channel pair CH0/CH1 and CH4/CH5 */
FTM1->COMBINE = FTM_COMBINE_COMBINE0_MASK | FTM_COMBINE_COMP0_MASK | FTM_COMBINE_DTEN0_MASK
| FTM_COMBINE_COMBINE2_MASK | FTM_COMBINE_COMP2_MASK | FTM_COMBINE_DTEN2_MASK;
FTM1->CONTROLS[0].CnSC=FTM_CnSC_ELSB_MASK; // Select high-true pulses
FTM1->CONTROLS[1].CnSC=FTM_CnSC_ELSB_MASK; // Select high-true pulses
FTM1->CONTROLS[4].CnSC=FTM_CnSC_ELSB_MASK; // Select high-true pulses
FTM1->CONTROLS[5].CnSC=FTM_CnSC_ELSB_MASK; // Select high-true pulses
/* Set Modulo (10kHz PWM frequency @112MHz system clock) */
FTM1->MOD = FTM_MOD_MOD(11200-1); // Set modulo
FTM1->CONTROLS[0].CnV=FTM_CnV_VAL(2800); // Set channel Value
FTM1->CONTROLS[1].CnV=FTM_CnV_VAL(8400); // Set channel Value
FTM1->CONTROLS[4].CnV=FTM_CnV_VAL(5600); // Set channel Value
FTM1->CONTROLS[5].CnV=FTM_CnV_VAL(11200); // Set channel Value
FTM1->CNT = 0; // Counter reset
/* Insert DeadTime (1us) */
FTM1->DEADTIME = FTM_DEADTIME_DTPS(3) | FTM_DEADTIME_DTVAL(7);
FTM1->SC|=FTM_SC_CLKS(1)|FTM_SC_PWMEN0_MASK|FTM_SC_PWMEN1_MASK|FTM_SC_PWMEN4_MASK
|FTM_SC_PWMEN5_MASK; // Select clock and enable PWM
while(1);
}
which part is phase shift setting ?
CnV i think is duty cycle , 2800 25% 8400 75% duty cycle, why waveform is 50% duty cycle