code generate error

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code generate error

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1,647 Views
gumu
Contributor V

Hi NXP team,

I have configured PTA14 as ADC_1, but  Siul2_Port_Ip_Cfg.c doesn't have generated code.

gumu_0-1681730065469.png

 

{
        .base                        = IP_SIUL2,
        .pinPortIdx                  = 12u,
        .mux                         = PORT_MUX_ALT3,
        .safeMode                    = PORT_SAFE_MODE_DISABLED,
        .inputFilter                 = PORT_INPUT_FILTER_DISABLED,
        .pullConfig                  = PORT_INTERNAL_PULL_NOT_ENABLED,
        .pullKeep                    = PORT_PULL_KEEP_DISABLED,
        .invert                      = PORT_INVERT_DISABLED,
        .inputBuffer                 = PORT_INPUT_BUFFER_ENABLED,
        .outputBuffer                = PORT_OUTPUT_BUFFER_DISABLED,
        .adcInterleaves              = { MUX_MODE_NOT_AVAILABLE, MUX_MODE_NOT_AVAILABLE },
        .inputMuxReg                 = {
                                         1u
                                       },
        .inputMux                    = { 
                                         PORT_INPUT_MUX_ALT2,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT
                                       },
    },
    {
        .base                        = IP_SIUL2,
        .pinPortIdx                  = 16u,
        .mux                         = PORT_MUX_AS_GPIO,
        .safeMode                    = PORT_SAFE_MODE_DISABLED,
        .inputFilter                 = PORT_INPUT_FILTER_DISABLED,
        .pullConfig                  = PORT_INTERNAL_PULL_NOT_ENABLED,
        .pullKeep                    = PORT_PULL_KEEP_DISABLED,
        .invert                      = PORT_INVERT_DISABLED,
        .inputBuffer                 = PORT_INPUT_BUFFER_ENABLED,
        .outputBuffer                = PORT_OUTPUT_BUFFER_DISABLED,
        .adcInterleaves              = { MUX_MODE_NOT_AVAILABLE, MUX_MODE_NOT_AVAILABLE },
        .inputMux                    = {
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT,
                                         PORT_INPUT_MUX_NO_INIT
                                       },
    },

 

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VaneB
NXP TechSupport
NXP TechSupport

Hi @gumu 

You are correct, the pins that are labeled as default in Config Tools it does not appear in the pin configuration structure since technically it would be making a double configuration of the same functionality.

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VaneB
NXP TechSupport
NXP TechSupport

Hi @gumu 

Did you update the code once you finish the changes on ConfigTools?

VaneB_0-1681755327672.png

 

B.R.

VaneB

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gumu
Contributor V

Hi @VaneB ,

Yes, I clicked 'update code'.

PIN module is not able to generate code for these pins which are routed as default .

PTA14 is routed to ADC as default

Is it right?

 

1,613 Views
VaneB
NXP TechSupport
NXP TechSupport

Hi @gumu 

You are correct, the pins that are labeled as default in Config Tools it does not appear in the pin configuration structure since technically it would be making a double configuration of the same functionality.

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