Write Protected and Erase Failed

[yunxin]

Chip is S32K118. Ref S32KRM, the DEPART is 0, 3, 8, 9, 0xB,0xf. The Software is Containsed boot0(0~16k,write protected) , boot1(FFH) and App(48K~192K), Dflash is 2k Eeprom and 8k Dflash. The DEPART is 9. There are two apps,. Download app1 via boot0, the software can run.Download app2 via boot0,the software can 't run, because the DEPART is 0xD or 0xE, the EEprom is init failed, the software is at while(EEERDY == 0). then Download app1 via boot0, the software can 't run, because the DEPART is always ,0xD or 0xE and the EEprom is init failed, the software is at while(EEERDY == 0). If it is no useful Dflash ,the app1 or app2 can run, but Erase 8K Dflash can cause a debug crash.

During initialization, check that the value of DEPART is not within the range provided in the manual, resulting in the failure of EEPROM initialization.

APP1 is runing over 24h，then updata app2，EEprom initialization is the same as app1.

The FSEC is: KEYEN: Disabled MEEN: Enabled FSLACC: Granted SEC: unsecure.

Erase all blocks via the example "flash_partitioning_s32k118" at RAM in S32 Platform , it is failed ,because write protected. Erase chip failed by Jlink or Pe ,because write protected.

Now, there is no way to repartition Dflash. I can't reproduce the fault with the new chip in pcba.

Is there any way to recover the chip, I need a way to recover the chip so I can continue testing to find out? I wonder why that is?

[yunxin]

Add description:

The boot0 is no wirte protected when running, and the boot0 is reprogramed (write protected)by jlink after running 24h ,then upgrade app2 .

Some of them work, some of them don't work, after upgrade app2 .

[lukaszadrapa]

Hi,

If my understanding is correct: you have partitioned the device to EEESIZE = 3 (2KB) and DEPART = 9 (8KB Dflash, 24KB EEE backup) and then you can see that the DEPART is somehow changed to 0xD or 0xE. Is that correct?
If yes, it is not expected behavior, it must be result of some fault. Partition cannot be changed until mass erase is performed.
- Are you sure that partition operation was not terminated by unexpected reset or power down?
- Are you sure that the device is running within specification? Are all voltages within the specified range and are all clocks on the device configured as required and specified?
Is only one device affected? Or can you see the same issue on more devices?

Regards,

Lukas

[yunxin]

Yes.

During the second programming of boot0（with write protected）, the whole chip erasing was not performed, and abnormal Jlink connection existed in part of PCBA.

One PCBA updrages app2 via jlink, then don't work.

One PCBA updrages app2 via boot0 by can, then don't work.

One PCBA updrages boot0 another again, jlink connection is abnormal, do not let programming, then don't work, the app is app1.

Other PCBA are normal, but some require UNLOCK to upgrade boot0.

How can I to  recovery the three PCBA.?

- Are you sure that partition operation was not terminated by unexpected reset or power down?
- Are you sure that the device is running within specification? Are all voltages within the specified range and are all clocks on the device configured as required and specified?

I wonder if JLINK's connection burn boot0 (0~ 16K) will cause the above situation?

The clock configuration follows a routine. FLASH CLOCK is 24Mhz. SYS CLOCK is 48Mhz, BUS CLOCK is 48Mhz.

The PCBA is running at least 24h, the first partition should have been a success.