Why does adding EMCEM to the S32K3 module cause a hard fault handler?

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Why does adding EMCEM to the S32K3 module cause a hard fault handler?

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Allen_863
Contributor III

I want to add EMCEM to my current code, but after adding it, I found that it goes into the Hard Fault Handler. However, if I remove EMCEM, my code will return to a working state.

Q23.png

Q24.png

I tried turning off both Fault Groups and DCM Faults to see if the problem was caused by EMCEM's detection, but it still didn't work.

q26.png

I tried adjusting FREERTOS's TOTAL HEAP SIZE = 32768, TIMER TASK STACK DEPTH = 2048, and QUEUE REGISTRY SIZE = 10, but it didn't work.

q27.png

The message says "bus fault," but before I added the EMCEM module, all functions worked fine, and there was no bus fault. I don't know why it says this.

q28.png

 

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Allen_863,

Can you check in the MC_ME PRTN1_COFB0_STAT register whether the ERM clock is running or not before the eMCEM, ERM initialization?

danielmartynek_1-1764321468681.png

danielmartynek_0-1764321388232.png

 

Thank you,

BR, Daniel

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Allen_863,

It appears that the fault occurs during ERM initialization. Could you verify whether the ERM clock is disabled?

If the clock is enabled, please provide additional details about the fault so we can investigate further.

https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Handling-Interrupt-DS3-5-...

 

https://community.nxp.com/t5/S32K-Knowledge-Base/How-To-Debug-A-Fault-Exception-On-ARM-Cortex-M-V7M-...

 

https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447

 

BR, Daniel

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Allen_863
Contributor III

When configuring EMCEM, I didn't configure the clock. I only added the EMCEM module and added `eMcem_Init(&eMcem_Config_0)`. However, I checked the CLOCK configuration and it shows `ERM0_CLK = 40 MHz`. Is this correct?

6.png

Then I found the problem was in the `SAFETYBASE_REG_WRITE32( addr, ERM_SR_CLEAR_VAL_U32 );` operation of `eMcem_Erm_Init`. If I commented `SAFETYBASE_REG_WRITE32( addr, ERM_SR_CLEAR_VAL_U32 );`, the `HARD FAULT HANDLER` error wouldn't occur. However, this is the RTD driver, and I don't think I should modify it.

7.png

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Allen_863,

Can you check in the MC_ME PRTN1_COFB0_STAT register whether the ERM clock is running or not before the eMCEM, ERM initialization?

danielmartynek_1-1764321468681.png

danielmartynek_0-1764321388232.png

 

Thank you,

BR, Daniel

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Allen_863
Contributor III

I checked bit 23 of MC_ME PRTN1_COFB0_STAT and found it to be 0. Then I found the switch for PRTN1_COFB0_REQ23.

Q2.png

Thank you for your help.

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