Where can I find documentation regarding lockstep mode for S32K344 ?

[kyf]

Hello fellow community members!

I'm looking for documentation regarding lockstep mode. I'm studying the RM at the moment and I've found some stuff in the "Security and Device GPRs" section.

Is there any more documentation regarding lockstep in S32K344 ?



Kind regards,

kyf

[davidtosenovjan]

Could you clarify what information you would like to know about lockstep? I am attaching screenshot from some old presentation for different device, where this concept has been used as well.

[kyf]

Hello @davidtosenovjan .

I'm sorry for the late response but I was on vacation and I had no PC in order to reply to you.

I'm looking for documentation regarding:

- Register description regarding lockstep

- Does lockstep have interrupts or pin-outputs ? (Description of Lockstep usage and features)

- How to configure Lockstep outputs (hardware pins or errors) ?

I've found "Safety concept MPC5643L.pptx" file from freescale. This file includes also the image that you've shared above but still I can't understand of how I can make use of Lockstep feature.

I've grasped the generic idea of what Lockstep is and what it does but I'm looking for the details regarding this feature.

[davidtosenovjan · Accepted solution]

If you see datasheet, section 2 Block diagram, you may see which S32K3 derivatives are configured with lockstep and which are configured for decoupled mode (diagram shows dual core or triple core). Easiest and safest way is to order proper variant.

Otherwise you can change configuration by program new DCF client (OTP memory, attached embedded excel S32K3xx_DCF_clients.xlsx) with LOCKSTEP_EN = 0, it makes checker core as independent or otherwise. Programming of DCF records is not trivial task but it is manageable. User would be aware that he can easily destroy the chip in case the programming is not done properly and the device may never exit from reset.

- Register description regarding lockstep

It is spread over whole reference manual. Due to lockstep/decoupled there are changes in internal memory organization, XBAR ports, FCCU faults and so. These all changes are related to the fact that lockstepped cores act as one (from SW point of view) )and decoupled as two cores.

- Does lockstep have interrupts or pin-outputs ? (Description of Lockstep usage and features)

There is one FCCU fault related to lockstep error, it also may invoke interrupt or error output pin indication.

- How to configure Lockstep outputs (hardware pins or errors) ?

Pay attention to RM, section 50.6.5 EOUT interface

[kyf]

If you see datasheet, section 2 Block diagram, you may see which S32K3 derivatives are configured with lockstep and which are configured for decoupled mode (diagram shows dual core or triple core). Easiest and safest way is to order proper variant.

I've selected S344 and S341 based on the default-enabled Lockstep feature.

Otherwise you can change configuration by program new DCF client (OTP memory, attached embedded excel S32K3xx_DCF_clients.xlsx) with LOCKSTEP_EN = 0, it makes checker core as independent or otherwise. Programming of DCF records is not trivial task but it is manageable. User would be aware that he can easily destroy the chip in case the programming is not done properly and the device may never exit from reset.

That's very interesting !

[kyf]

Good morning David.

Thank you for your assistance to my query !!