The TDF field of SPI status register is read-only and can only mark whether SPI transmission is completed. I would like to ask how to trigger SPI interrupt through software
static status_t LPSPI_DRV_MasterStartTransfer(uint32_t instance,
const uint8_t * sendBuffer,
uint8_t * receiveBuffer,
uint16_t transferByteCount)
{
DEV_ASSERT(instance < LPSPI_INSTANCE_COUNT);
DEV_ASSERT(g_lpspiStatePtr[instance] != NULL);
/* Instantiate local variable of type dspi_master_state_t and point to global state */
lpspi_state_t * lpspiState = g_lpspiStatePtr[instance];
LPSPI_Type *base = g_lpspiBase[instance];
edma_transfer_size_t dmaTransferSize = EDMA_TRANSFER_SIZE_1B;
/* Check that we're not busy. */
if (LPSPI_GetStatusFlag(base, LPSPI_MODULE_BUSY))
{
return STATUS_BUSY;
}
#ifdef ERRATA_E10655
else
{
/* Double check to fix errata e10655. */
if (LPSPI_GetStatusFlag(base, LPSPI_MODULE_BUSY))
{
return STATUS_BUSY;
}
}
#endif
/* Verify if the number of bytes is divided by number of bytes/frame. */
if ((transferByteCount % lpspiState->bytesPerFrame) != (uint16_t)0)
{
return STATUS_ERROR;
}
/* Clean RX and TX buffers */
LPSPI_SetFlushFifoCmd(base, true, true);
/* The second flush command is used to avoid the case when one word is still in shifter. */
LPSPI_SetFlushFifoCmd(base, true, true);
if(lpspiState->isPcsContinuous == true)
{
LPSPI_SetContCBit(base);
}
lpspiState->status = LPSPI_TRANSFER_OK;
/* Clear all interrupts sources */
(void)LPSPI_ClearStatusFlag(base, LPSPI_ALL_STATUS);
/* Enable fault interrupts sources */
LPSPI_SetIntMode(base,LPSPI_TRANSMIT_ERROR , true);
if (receiveBuffer != NULL)
{
LPSPI_SetIntMode(base,LPSPI_RECEIVE_ERROR , true);
}
/* Configure rxCount depending on transfer type.*/
if (receiveBuffer == NULL)
{
lpspiState->rxCount = 0;
LPSPI_SetRxmskBit(base);
}
else
{
lpspiState->rxCount = transferByteCount;
LPSPI_ClearRxmaskBit(base);
}
/* Configure watermarks */
LPSPI_SetRxWatermarks(base, 0U);
LPSPI_SetTxWatermarks(base, 2U);
if (lpspiState->transferType == LPSPI_USING_INTERRUPTS)
{
/* Fill out the other members of the run-time state structure. */
lpspiState->txBuff = (const uint8_t *)sendBuffer;
lpspiState->rxBuff = (uint8_t *)receiveBuffer;
lpspiState->txFrameCnt = 0;
lpspiState->rxFrameCnt = 0;
lpspiState->txCount = transferByteCount;
/*For continuous mode an extra word must be written to negate the PCS */
if (lpspiState->isPcsContinuous == true)
{
lpspiState->txCount++;
}
/* Update transfer status */
lpspiState->isTransferInProgress = true;
/* Enable RDF interrupt if RX buffer is not NULL. */
if (lpspiState->rxBuff != NULL)
{
LPSPI_SetIntMode(base, LPSPI_RX_DATA_FLAG, true);
}
/* Enable the TDF and RDF interrupt. */
LPSPI_SetIntMode(base, LPSPI_TX_DATA_FLAG, true);
}
else
{
/* When LPSPI use DMA frames with 3 bytes size are not accepted. */
switch(lpspiState->bytesPerFrame)
{
case 1: dmaTransferSize = EDMA_TRANSFER_SIZE_1B; break;
case 2: dmaTransferSize = EDMA_TRANSFER_SIZE_2B; break;
case 4: dmaTransferSize = EDMA_TRANSFER_SIZE_4B; break;
default : dmaTransferSize = EDMA_TRANSFER_SIZE_4B; break;
}
/* Configure TX DMA channel */
if (sendBuffer != NULL)
{
(void)EDMA_DRV_ConfigMultiBlockTransfer(lpspiState->txDMAChannel, EDMA_TRANSFER_MEM2PERIPH,
(uint32_t)sendBuffer, (uint32_t)(&(base->TDR)), dmaTransferSize, (uint32_t)1U<<(uint8_t)(dmaTransferSize),
(uint32_t)transferByteCount/(uint32_t)((uint32_t)1U <<(uint8_t)(dmaTransferSize)), true);
}
else
{
(void)EDMA_DRV_ConfigMultiBlockTransfer(lpspiState->txDMAChannel, EDMA_TRANSFER_PERIPH2PERIPH,
(uint32_t)(&(lpspiState->dummy)), (uint32_t)(&(base->TDR)), dmaTransferSize, (uint32_t)1U<<(uint8_t)(dmaTransferSize),
(uint32_t)transferByteCount/(uint32_t)((uint32_t)1U <<(uint8_t)(dmaTransferSize)), true);
}
/* Configure RX DMA channel if is used in current transfer. */
if(receiveBuffer != NULL)
{
(void)EDMA_DRV_ConfigMultiBlockTransfer(lpspiState->rxDMAChannel, EDMA_TRANSFER_PERIPH2MEM,
(uint32_t)(&(base->RDR)),(uint32_t)receiveBuffer, dmaTransferSize, (uint32_t)1U<<(uint8_t)(dmaTransferSize),
(uint32_t)transferByteCount/(uint32_t)((uint32_t)1U <<(uint8_t)(dmaTransferSize)), true);
(void)EDMA_DRV_InstallCallback(lpspiState->rxDMAChannel, (LPSPI_DRV_MasterCompleteRX),(void*)(instance));
/* Start RX channel */
(void)EDMA_DRV_StartChannel(lpspiState->rxDMAChannel);
}
/* If RX buffer is null the transfer is done when all bytes were sent. */
(void)EDMA_DRV_InstallCallback(lpspiState->txDMAChannel, (LPSPI_DRV_MasterCompleteDMATransfer),(void*)(instance));
/* Start TX channel */
(void)EDMA_DRV_StartChannel(lpspiState->txDMAChannel);
/* Update transfer status */
lpspiState->isTransferInProgress = true;
/* Enable LPSPI DMA request */
if (receiveBuffer!=NULL)
{
LPSPI_SetRxDmaCmd(base, true);
}
LPSPI_SetTxDmaCmd(base, true);
}
return STATUS_SUCCESS;
}
In this function, only SPI sending and receiving interrupt are enabled, but which statement triggers SPI interrupt
