What is the role of DOZE mode of many modules

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What is the role of DOZE mode of many modules

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Contributor I
  • What is the use scenario of this kind of DOZE, can you give an example to illustrate,So I can know how to use this model
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NXP TechSupport
NXP TechSupport

Hello,

The RM 12.1 describes this in the section "39.4.5 Peripheral Doze".

Several peripherals support Peripheral Doze mode. In this mode, a register field can be used to disable the peripheral for the duration of a low-power mode.

So, for example, LPSPI operation can continue operating in stop mode if the Doze Enable bit (CR[DOZEN]) is clear and the LPSPI is using an external or internal clock source that remains operating during stop mode.

Otherwise when the DOZEN bit is set the LPSPI is disabled for the duration of a stop mode.

This question has been already discussed in these community threads:

How is the Doze mode working in S32K series 

Low power and Doze Mode question in S32K 

I hope it helps.

Best regards,

Diana

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NXP TechSupport
NXP TechSupport

Hello,

The RM 12.1 describes this in the section "39.4.5 Peripheral Doze".

Several peripherals support Peripheral Doze mode. In this mode, a register field can be used to disable the peripheral for the duration of a low-power mode.

So, for example, LPSPI operation can continue operating in stop mode if the Doze Enable bit (CR[DOZEN]) is clear and the LPSPI is using an external or internal clock source that remains operating during stop mode.

Otherwise when the DOZEN bit is set the LPSPI is disabled for the duration of a stop mode.

This question has been already discussed in these community threads:

How is the Doze mode working in S32K series 

Low power and Doze Mode question in S32K 

I hope it helps.

Best regards,

Diana

View solution in original post

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